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[/] [eco32/] [tags/] [eco32-0.24/] [fpga/] [src/] [clk_reset/] [clk_reset.v] - Diff between revs 27 and 127

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Rev 27 Rev 127
Line 1... Line 1... 
 
 
//
 
 
 
// clk_reset.v -- clock and reset generator
 
 
 
//
 
 
 
 
 
 
 
 
 
module clk_reset(clk_in, reset_inout_n,
 
module clk_reset(clk_in, reset_inout_n,
 
                 sdram_clk, sdram_fb,
 
                 sdram_clk, sdram_fb,
 
                 clk, clk_ok, reset);
 
                 clk, clk_ok, reset);
 
    input clk_in;
 
    input clk_in;
 
    inout reset_inout_n;
 
    inout reset_inout_n;
Line 19... Line 24... 
  reg reset_p_n;
 
  reg reset_p_n;
 
  reg reset_s_n;
 
  reg reset_s_n;
 
  reg [23:0] reset_counter;
 
  reg [23:0] reset_counter;
 
  wire reset_counting;
 
  wire reset_counting;
 
 
 
 
 
//--------------------------------------------------------------
 
  //------------------------------------------------------------
 
 
 
 
 
  IBUFG clk_in_buffer(.I(clk_in), .O(clk_in_buf));
 
  IBUFG clk_in_buffer(
 
 
 
    .I(clk_in),
 
 
 
    .O(clk_in_buf)
 
 
 
  );
 
 
 
 
 
  DCM int_dcm (
 
  DCM int_dcm (
 
    .CLKIN(clk_in_buf),
 
    .CLKIN(clk_in_buf),
 
    .CLKFB(clk),
 
    .CLKFB(clk),
 
    .RST(1'b0),
 
    .RST(1'b0),
 
    .CLK0(int_clk),
 
    .CLK0(int_clk),
 
    .LOCKED(int_locked)
 
    .LOCKED(int_locked)
 
  );
 
  );
 
 
 
 
 
  BUFG int_clk_buffer(.I(int_clk), .O(clk));
 
  BUFG int_clk_buffer(
 
 
 
    .I(int_clk),
 
 
 
    .O(clk)
 
 
 
  );
 
 
 
 
 
//--------------------------------------------------------------
 
  //------------------------------------------------------------
 
 
 
 
 
  SRL16 ext_dll_rst_gen(
 
  SRL16 ext_dll_rst_gen(
 
    .CLK(clk_in_buf),
 
    .CLK(clk_in_buf),
 
    .D(int_locked),
 
    .D(int_locked),
 
    .Q(ext_rst_n),
 
    .Q(ext_rst_n),
Line 47... Line 58... 
    .A3(1'b1)
 
    .A3(1'b1)
 
  );
 
  );
 
 
 
 
 
  defparam ext_dll_rst_gen.INIT = 16'h0000;
 
  defparam ext_dll_rst_gen.INIT = 16'h0000;
 
 
 
 
 
//--------------------------------------------------------------
 
  //------------------------------------------------------------
 
 
 
 
 
  IBUFG ext_fb_buffer(.I(sdram_fb), .O(ext_fb));
 
  IBUFG ext_fb_buffer(
 
 
 
    .I(sdram_fb),
 
 
 
    .O(ext_fb)
 
 
 
  );
 
 
 
 
 
  DCM ext_dcm (
 
  DCM ext_dcm (
 
    .CLKIN(clk_in_buf),
 
    .CLKIN(clk_in_buf),
 
    .CLKFB(ext_fb),
 
    .CLKFB(ext_fb),
 
    .RST(~ext_rst_n),
 
    .RST(~ext_rst_n),
Line 61... Line 75... 
    .LOCKED(ext_locked)
 
    .LOCKED(ext_locked)
 
  );
 
  );
 
 
 
 
 
  assign clk_ok = int_locked & ext_locked;
 
  assign clk_ok = int_locked & ext_locked;
 
 
 
 
 
//--------------------------------------------------------------
 
  //------------------------------------------------------------
 
 
 
 
 
  assign reset_counting = (reset_counter == 24'hFFFFFF) ? 0 : 1;
 
  assign reset_counting = (reset_counter == 24'hFFFFFF) ? 0 : 1;
 
  assign reset_inout_n = (reset_counter[23] == 0) ? 1'b0 : 1'bz;
 
  assign reset_inout_n = (reset_counter[23] == 0) ? 1'b0 : 1'bz;
 
 
 
 
 
  always @(posedge clk_in_buf) begin
 
  always @(posedge clk_in_buf) begin

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