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https://opencores.org/ocsvn/eco32/eco32/trunk
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| Rev 27 |
Rev 67 |
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Line 1... |
module kbd(ps2_clk, ps2_data,
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module kbd(ps2_clk, ps2_data,
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clk, reset,
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clk, reset,
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en, wr, addr2,
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en, wr, addr,
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data_in, data_out,
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data_in, data_out,
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wt, irq);
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wt, irq);
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input ps2_clk;
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input ps2_clk;
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input ps2_data;
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input ps2_data;
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input clk;
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input clk;
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input reset;
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input reset;
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input en;
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input en;
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input wr;
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input wr;
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input addr2;
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input addr;
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input [7:0] data_in;
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input [7:0] data_in;
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output [7:0] data_out;
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output [7:0] data_out;
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output wt;
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output wt;
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output irq;
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output irq;
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Line 38... |
end else begin
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end else begin
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if (keyboard_rdy == 1) begin
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if (keyboard_rdy == 1) begin
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data <= keyboard_data;
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data <= keyboard_data;
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end
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end
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if (keyboard_rdy == 1 ||
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if (keyboard_rdy == 1 ||
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(en == 1 && wr == 0 && addr2 == 1)) begin
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(en == 1 && wr == 0 && addr == 1)) begin
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rdy <= keyboard_rdy;
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rdy <= keyboard_rdy;
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end
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end
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if (en == 1 && wr == 1 && addr2 == 0) begin
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if (en == 1 && wr == 1 && addr == 0) begin
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rdy <= data_in[0];
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rdy <= data_in[0];
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ien <= data_in[1];
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ien <= data_in[1];
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end
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end
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end
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end
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end
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end
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assign data_out =
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assign data_out =
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(addr2 == 0) ? { 6'b000000, ien, rdy } : data;
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(addr == 0) ? { 6'b000000, ien, rdy } : data;
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assign wt = 1'b0;
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assign wt = 1'b0;
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assign irq = ien & rdy;
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assign irq = ien & rdy;
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endmodule
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endmodule
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