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https://opencores.org/ocsvn/eco32/eco32/trunk
[/] [eco32/] [trunk/] [fpga/] [mc-sim/] [Makefile] - Diff between revs 292 and 303
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#
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#
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# Dummy Makefile
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# Makefile for multicycle simulation of ECO32
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#
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#
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BUILD = ../../build
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SRCS = eco32test.v \
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src/eco32/eco32.v \
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src/clk_rst/clk_rst.v \
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src/cpu/cpu.v \
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src/cpu/cpu_bus.v \
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src/cpu/cpu_core.v \
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src/ram/ram.v \
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src/rom/rom.v \
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src/tmr/tmr.v \
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src/dsp/dsp.v \
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src/kbd/kbd.v \
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src/ser/ser.v
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BIN = eco32test
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.PHONY: all install run show clean
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all:
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all:
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install:
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install:
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$(BIN): $(SRCS)
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iverilog -Wall -o $(BIN) $(SRCS)
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run: $(BIN)
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@if [ ! -r duration.dat ] ; then \
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echo "cp defdata/duration.dat ." ; \
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cp defdata/duration.dat . ; \
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fi
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@if [ ! -r rom.dat ] ; then \
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echo "cp defdata/rom.dat ." ; \
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cp defdata/rom.dat . ; \
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fi
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@if [ ! -r kbd.dat ] ; then \
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echo "cp defdata/kbd.dat ." ; \
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cp defdata/kbd.dat . ; \
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fi
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@if [ ! -r ser0.dat ] ; then \
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echo "cp defdata/ser0.dat ." ; \
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cp defdata/ser0.dat . ; \
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fi
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@if [ ! -r ser1.dat ] ; then \
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echo "cp defdata/ser1.dat ." ; \
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cp defdata/ser1.dat . ; \
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fi
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./$(BIN)
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show: run
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gtkwave dump.vcd eco32test.cfg
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clean:
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clean:
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rm -f *~
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rm -f *~ $(BIN) dump.vcd
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rm -f duration.dat rom.dat
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rm -f kbd.dat dsp.out
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rm -f ser0.dat ser0.out
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rm -f ser1.dat ser1.out
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rm -f src/*~
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rm -f src/eco32/*~ src/clk_rst/*~ src/cpu/*~
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rm -f src/ram/*~ src/rom/*~ src/tmr/*~
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rm -f src/dsp/*~ src/kbd/*~ src/ser/*~
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