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;
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; start.s -- ECO32 ROM monitor startup and support routines
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;
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.set dmapaddr,0xC0000000 ; base of directly mapped addresses
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.set stacktop,0xC0010000 ; monitor stack is at top of 64K
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.set PSW,0 ; reg # of PSW
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.set V_SHIFT,27 ; interrupt vector ctrl bit
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.set V,1 << V_SHIFT
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.set TLB_INDEX,1 ; reg # of TLB Index
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.set TLB_ENTRY_HI,2 ; reg # of TLB EntryHi
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.set TLB_ENTRY_LO,3 ; reg # of TLB EntryLo
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.set TLB_ENTRIES,32 ; number of TLB entries
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.set USER_CONTEXT_SIZE,36*4 ; size of user context
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.set BIO_OUT,0xF1000000 ; board I/O output port
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.set SPI_EN,0x80000000 ; SPI bus enable ctrl bit
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;***************************************************************
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.import _ecode
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.import _edata
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.import _ebss
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.import kbdinit
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.import kbdinchk
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.import kbdin
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.import dspinit
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.import dspoutchk
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.import dspout
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.import serinit
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.import ser0inchk
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.import ser0in
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.import ser0outchk
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.import ser0out
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.import sctcapctl
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.import sctioctl
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.import sctcapser
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.import sctioser
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.import main
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.export _bcode
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.export _bdata
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.export _bbss
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.export cinchk
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.export cin
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.export coutchk
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.export cout
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.export sinchk
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.export sin
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.export soutchk
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.export sout
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.export dskcap
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.export dskio
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.export setISR
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.export setUMSR
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.export isrPtr
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.export umsrPtr
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.export getTLB_HI
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.export getTLB_LO
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.export setTLB
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.export saveState
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.export monitorReturn
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.import userContext
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.export resume
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;***************************************************************
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.code
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_bcode:
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.data
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_bdata:
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.bss
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_bbss:
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;***************************************************************
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.code
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.align 4
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reset:
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j start
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interrupt:
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j isr
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userMiss:
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j umsr
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;***************************************************************
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.code
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.align 4
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cinchk:
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j kbdinchk
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; j ser0inchk
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cin:
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j kbdin
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; j ser0in
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coutchk:
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j dspoutchk
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; j ser0outchk
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cout:
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j dspout
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; j ser0out
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sinchk:
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j ser0inchk
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sin:
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j ser0in
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soutchk:
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j ser0outchk
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sout:
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j ser0out
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dskcap:
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j dcap
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dskio:
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j dio
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reserved1:
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j reserved1
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reserved2:
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j reserved2
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reserved3:
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j reserved3
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setISR:
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j setISR1
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setUMSR:
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j setUMSR1
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;***************************************************************
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.code
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.align 4
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start:
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; let irq/exc vectors point to RAM
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add $8,$0,V
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mvts $8,PSW
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; disable flash ROM, enable SPI bus
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add $8,$0,BIO_OUT
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add $9,$0,SPI_EN
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stw $9,$8,0
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; initialize TLB
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mvts $0,TLB_ENTRY_LO ; invalidate all TLB entries
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add $8,$0,dmapaddr ; by impossible virtual page number
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add $9,$0,$0
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add $10,$0,TLB_ENTRIES
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tlbloop:
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mvts $8,TLB_ENTRY_HI
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mvts $9,TLB_INDEX
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tbwi
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add $8,$8,0x1000 ; all entries must be different
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add $9,$9,1
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bne $9,$10,tlbloop
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; copy data segment
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add $10,$0,_bdata ; lowest dst addr to be written to
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add $8,$0,_edata ; one above the top dst addr
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sub $9,$8,$10 ; $9 = size of data segment
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add $9,$9,_ecode ; data is waiting right after code
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j cpytest
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cpyloop:
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ldw $11,$9,0 ; src addr in $9
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stw $11,$8,0 ; dst addr in $8
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cpytest:
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sub $8,$8,4 ; downward
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sub $9,$9,4
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bgeu $8,$10,cpyloop
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; clear bss segment
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add $8,$0,_bbss ; start with first word of bss
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add $9,$0,_ebss ; this is one above the top
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j clrtest
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clrloop:
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stw $0,$8,0 ; dst addr in $8
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add $8,$8,4 ; upward
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clrtest:
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bltu $8,$9,clrloop
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; now do some useful work
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add $29,$0,stacktop ; setup monitor stack
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jal dspinit ; init display
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jal kbdinit ; init keyboard
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jal serinit ; init serial interface
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jal main ; enter command loop
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; main should never return
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j start ; just to be sure...
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;***************************************************************
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.code
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.align 4
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; Word getTLB_HI(int index)
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getTLB_HI:
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mvts $4,TLB_INDEX
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tbri
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mvfs $2,TLB_ENTRY_HI
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jr $31
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; Word getTLB_LO(int index)
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getTLB_LO:
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mvts $4,TLB_INDEX
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tbri
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mvfs $2,TLB_ENTRY_LO
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jr $31
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; void setTLB(int index, Word entryHi, Word entryLo)
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setTLB:
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mvts $4,TLB_INDEX
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mvts $5,TLB_ENTRY_HI
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mvts $6,TLB_ENTRY_LO
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tbwi
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jr $31
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;***************************************************************
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.code
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.align 4
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; int dskcap(int dskno)
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dcap:
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bne $4,$0,dcapser
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j sctcapctl
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dcapser:
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j sctcapser
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; int dskio(int dskno, char cmd, int sct, Word addr, int nscts)
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dio:
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bne $4,$0,dioser
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add $4,$5,$0
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add $5,$6,$0
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add $6,$7,$0
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ldw $7,$29,16
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j sctioctl
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dioser:
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add $4,$5,$0
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add $5,$6,$0
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add $6,$7,$0
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ldw $7,$29,16
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j sctioser
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;***************************************************************
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.code
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.align 4
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; void setISR(Word ptr)
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setISR1:
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stw $4,$0,isrPtr
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jr $31
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; void setUMSR(Word ptr)
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setUMSR1:
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stw $4,$0,umsrPtr
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jr $31
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.data
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.align 4
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isrPtr:
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.word 0
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umsrPtr:
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.word 0
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;***************************************************************
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.code
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.align 4
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; Bool saveState(MonitorState *msp)
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; always return 'true' here
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saveState:
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stw $31,$4,0*4 ; return address
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stw $29,$4,1*4 ; stack pointer
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stw $16,$4,2*4 ; local variables
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stw $17,$4,3*4
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stw $18,$4,4*4
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stw $19,$4,5*4
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stw $20,$4,6*4
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stw $21,$4,7*4
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stw $22,$4,8*4
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stw $23,$4,9*4
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add $2,$0,1
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jr $31
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; load state when re-entering monitor
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; this appears as if returning from saveState
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; but the return value is 'false' here
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loadState:
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ldw $8,$0,monitorReturn
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beq $8,$0,loadState ; fatal error: monitor state lost
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ldw $31,$8,0*4 ; return address
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ldw $29,$8,1*4 ; stack pointer
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ldw $16,$8,2*4 ; local variables
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ldw $17,$8,3*4
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ldw $18,$8,4*4
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ldw $19,$8,5*4
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ldw $20,$8,6*4
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ldw $21,$8,7*4
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ldw $22,$8,8*4
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ldw $23,$8,9*4
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add $2,$0,0
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jr $31
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.bss
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.align 4
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; extern MonitorState *monitorReturn
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monitorReturn:
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.space 4
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; extern UserContext userContext
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userContext:
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.space USER_CONTEXT_SIZE
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;***************************************************************
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.code
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.align 4
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; void resume(void)
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; use userContext to load state
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resume:
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mvts $0,PSW
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add $28,$0,userContext
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.nosyn
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ldw $8,$28,33*4 ; tlbIndex
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mvts $8,TLB_INDEX
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ldw $8,$28,34*4 ; tlbEntryHi
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mvts $8,TLB_ENTRY_HI
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ldw $8,$28,35*4 ; tlbEntryLo
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mvts $8,TLB_ENTRY_LO
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;ldw $0,$28,0*4 ; registers
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ldw $1,$28,1*4
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ldw $2,$28,2*4
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ldw $3,$28,3*4
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ldw $4,$28,4*4
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ldw $5,$28,5*4
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ldw $6,$28,6*4
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ldw $7,$28,7*4
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ldw $8,$28,8*4
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ldw $9,$28,9*4
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ldw $10,$28,10*4
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ldw $11,$28,11*4
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ldw $12,$28,12*4
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ldw $13,$28,13*4
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ldw $14,$28,14*4
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ldw $15,$28,15*4
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ldw $16,$28,16*4
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ldw $17,$28,17*4
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ldw $18,$28,18*4
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ldw $19,$28,19*4
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ldw $20,$28,20*4
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ldw $21,$28,21*4
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ldw $22,$28,22*4
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ldw $23,$28,23*4
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ldw $24,$28,24*4
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ldw $25,$28,25*4
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ldw $26,$28,26*4
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ldw $27,$28,27*4
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;ldw $28,$28,28*4
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ldw $29,$28,29*4
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ldw $30,$28,30*4
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ldw $31,$28,31*4
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ldw $28,$28,32*4 ; psw
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mvts $28,PSW
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rfx
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.syn
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; interrupt entry
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; use userContext to store state
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isr:
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umsr:
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.nosyn
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ldhi $28,userContext
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or $28,$28,userContext
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stw $0,$28,0*4 ; registers
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stw $1,$28,1*4
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stw $2,$28,2*4
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stw $3,$28,3*4
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stw $4,$28,4*4
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stw $5,$28,5*4
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stw $6,$28,6*4
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stw $7,$28,7*4
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stw $8,$28,8*4
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stw $9,$28,9*4
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stw $10,$28,10*4
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stw $11,$28,11*4
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stw $12,$28,12*4
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stw $13,$28,13*4
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stw $14,$28,14*4
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stw $15,$28,15*4
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stw $16,$28,16*4
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stw $17,$28,17*4
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stw $18,$28,18*4
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stw $19,$28,19*4
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stw $20,$28,20*4
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stw $21,$28,21*4
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stw $22,$28,22*4
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stw $23,$28,23*4
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stw $24,$28,24*4
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stw $25,$28,25*4
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stw $26,$28,26*4
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stw $27,$28,27*4
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stw $28,$28,28*4
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stw $29,$28,29*4
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stw $30,$28,30*4
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stw $31,$28,31*4
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mvfs $8,PSW
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stw $8,$28,32*4 ; psw
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mvfs $8,TLB_INDEX
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stw $8,$28,33*4 ; tlbIndex
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mvfs $8,TLB_ENTRY_HI
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stw $8,$28,34*4 ; tlbEntryHi
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mvfs $8,TLB_ENTRY_LO
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stw $8,$28,35*4 ; tlbEntryLo
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.syn
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j loadState
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No newline at end of file
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No newline at end of file
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