| Line 24... |
Line 24... |
static TLB_Entry tlb[TLB_SIZE];
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static TLB_Entry tlb[TLB_SIZE];
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static Word tlbIndex;
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static Word tlbIndex;
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static Word tlbEntryHi;
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static Word tlbEntryHi;
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static Word tlbEntryLo;
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static Word tlbEntryLo;
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static Word mmuBadAddr;
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static Word mmuBadAddr;
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static Word mmuBadAccs;
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static int assoc(Word page) {
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static int assoc(Word page) {
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int n, i;
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int n, i;
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| Line 39... |
Line 40... |
}
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}
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return n;
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return n;
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}
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}
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static Word v2p(Word vAddr, Bool userMode, Bool writing) {
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static Word v2p(Word vAddr, Bool userMode, Bool writing, int accsWidth) {
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Word pAddr;
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Word pAddr;
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Word page, offset;
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Word page, offset;
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int index;
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int index;
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if (debugUse) {
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if (debugUse) {
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cPrintf("**** vAddr = 0x%08X", vAddr);
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cPrintf("**** vAddr = 0x%08X", vAddr);
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}
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}
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if ((vAddr & 0x80000000) != 0 && userMode) {
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if ((vAddr & 0x80000000) != 0 && userMode) {
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/* trying to access a privileged address from user mode */
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/* trying to access a privileged address from user mode */
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mmuBadAccs = (writing ? MMU_ACCS_WRITE : MMU_ACCS_READ) | accsWidth;
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mmuBadAddr = vAddr;
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mmuBadAddr = vAddr;
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throwException(EXC_PRV_ADDRESS);
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throwException(EXC_PRV_ADDRESS);
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}
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}
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if ((vAddr & 0xC0000000) == 0xC0000000) {
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if ((vAddr & 0xC0000000) == 0xC0000000) {
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/* unmapped address space */
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/* unmapped address space */
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| Line 65... |
Line 67... |
page = vAddr & PAGE_MASK;
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page = vAddr & PAGE_MASK;
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offset = vAddr & OFFSET_MASK;
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offset = vAddr & OFFSET_MASK;
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index = assoc(page);
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index = assoc(page);
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if (index == -1) {
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if (index == -1) {
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/* TLB miss exception */
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/* TLB miss exception */
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mmuBadAccs = (writing ? MMU_ACCS_WRITE : MMU_ACCS_READ) | accsWidth;
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mmuBadAddr = vAddr;
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mmuBadAddr = vAddr;
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tlbEntryHi = page;
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tlbEntryHi = page;
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throwException(EXC_TLB_MISS);
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throwException(EXC_TLB_MISS);
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}
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}
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if (!tlb[index].valid) {
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if (!tlb[index].valid) {
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/* TLB invalid exception */
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/* TLB invalid exception */
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mmuBadAccs = (writing ? MMU_ACCS_WRITE : MMU_ACCS_READ) | accsWidth;
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mmuBadAddr = vAddr;
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mmuBadAddr = vAddr;
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tlbEntryHi = page;
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tlbEntryHi = page;
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throwException(EXC_TLB_INVALID);
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throwException(EXC_TLB_INVALID);
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}
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}
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if (!tlb[index].write && writing) {
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if (!tlb[index].write && writing) {
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/* TLB write exception */
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/* TLB write exception */
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mmuBadAccs = (writing ? MMU_ACCS_WRITE : MMU_ACCS_READ) | accsWidth;
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mmuBadAddr = vAddr;
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mmuBadAddr = vAddr;
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tlbEntryHi = page;
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tlbEntryHi = page;
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throwException(EXC_TLB_WRITE);
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throwException(EXC_TLB_WRITE);
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}
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}
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pAddr = tlb[index].frame | offset;
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pAddr = tlb[index].frame | offset;
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| Line 93... |
Line 98... |
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Word mmuReadWord(Word vAddr, Bool userMode) {
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Word mmuReadWord(Word vAddr, Bool userMode) {
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if ((vAddr & 3) != 0) {
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if ((vAddr & 3) != 0) {
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/* throw illegal address exception */
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/* throw illegal address exception */
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mmuBadAccs = MMU_ACCS_READ | MMU_ACCS_WORD;
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mmuBadAddr = vAddr;
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mmuBadAddr = vAddr;
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throwException(EXC_ILL_ADDRESS);
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throwException(EXC_ILL_ADDRESS);
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}
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}
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return memoryReadWord(v2p(vAddr, userMode, false));
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return memoryReadWord(v2p(vAddr, userMode, false, MMU_ACCS_WORD));
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}
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}
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Half mmuReadHalf(Word vAddr, Bool userMode) {
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Half mmuReadHalf(Word vAddr, Bool userMode) {
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if ((vAddr & 1) != 0) {
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if ((vAddr & 1) != 0) {
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/* throw illegal address exception */
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/* throw illegal address exception */
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mmuBadAccs = MMU_ACCS_READ | MMU_ACCS_HALF;
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mmuBadAddr = vAddr;
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mmuBadAddr = vAddr;
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throwException(EXC_ILL_ADDRESS);
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throwException(EXC_ILL_ADDRESS);
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}
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}
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return memoryReadHalf(v2p(vAddr, userMode, false));
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return memoryReadHalf(v2p(vAddr, userMode, false, MMU_ACCS_HALF));
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}
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}
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Byte mmuReadByte(Word vAddr, Bool userMode) {
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Byte mmuReadByte(Word vAddr, Bool userMode) {
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return memoryReadByte(v2p(vAddr, userMode, false));
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return memoryReadByte(v2p(vAddr, userMode, false, MMU_ACCS_BYTE));
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}
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}
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void mmuWriteWord(Word vAddr, Word data, Bool userMode) {
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void mmuWriteWord(Word vAddr, Word data, Bool userMode) {
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if ((vAddr & 3) != 0) {
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if ((vAddr & 3) != 0) {
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/* throw illegal address exception */
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/* throw illegal address exception */
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mmuBadAccs = MMU_ACCS_WRITE | MMU_ACCS_WORD;
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mmuBadAddr = vAddr;
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mmuBadAddr = vAddr;
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throwException(EXC_ILL_ADDRESS);
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throwException(EXC_ILL_ADDRESS);
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}
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}
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memoryWriteWord(v2p(vAddr, userMode, true), data);
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memoryWriteWord(v2p(vAddr, userMode, true, MMU_ACCS_WORD), data);
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}
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}
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void mmuWriteHalf(Word vAddr, Half data, Bool userMode) {
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void mmuWriteHalf(Word vAddr, Half data, Bool userMode) {
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if ((vAddr & 1) != 0) {
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if ((vAddr & 1) != 0) {
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/* throw illegal address exception */
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/* throw illegal address exception */
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mmuBadAccs = MMU_ACCS_WRITE | MMU_ACCS_HALF;
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mmuBadAddr = vAddr;
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mmuBadAddr = vAddr;
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throwException(EXC_ILL_ADDRESS);
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throwException(EXC_ILL_ADDRESS);
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}
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}
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memoryWriteHalf(v2p(vAddr, userMode, true), data);
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memoryWriteHalf(v2p(vAddr, userMode, true, MMU_ACCS_HALF), data);
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}
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}
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void mmuWriteByte(Word vAddr, Byte data, Bool userMode) {
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void mmuWriteByte(Word vAddr, Byte data, Bool userMode) {
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memoryWriteByte(v2p(vAddr, userMode, true), data);
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memoryWriteByte(v2p(vAddr, userMode, true, MMU_ACCS_BYTE), data);
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}
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}
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Word mmuGetIndex(void) {
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Word mmuGetIndex(void) {
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return tlbIndex;
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return tlbIndex;
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| Line 180... |
Line 189... |
void mmuSetBadAddr(Word value) {
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void mmuSetBadAddr(Word value) {
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mmuBadAddr = value;
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mmuBadAddr = value;
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}
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}
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Word mmuGetBadAccs(void) {
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return mmuBadAccs;
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}
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void mmuSetBadAccs(Word value) {
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mmuBadAccs = value;
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}
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void mmuTbs(void) {
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void mmuTbs(void) {
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int index;
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int index;
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index = assoc(tlbEntryHi & PAGE_MASK);
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index = assoc(tlbEntryHi & PAGE_MASK);
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if (index == -1) {
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if (index == -1) {
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| Line 281... |
Line 300... |
}
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}
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tlbIndex = rand() & TLB_MASK;
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tlbIndex = rand() & TLB_MASK;
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tlbEntryHi = rand() & PAGE_MASK;
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tlbEntryHi = rand() & PAGE_MASK;
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tlbEntryLo = rand() & (PAGE_MASK | TLB_WRITE | TLB_VALID);
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tlbEntryLo = rand() & (PAGE_MASK | TLB_WRITE | TLB_VALID);
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mmuBadAddr = rand();
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mmuBadAddr = rand();
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mmuBadAccs = rand() & MMU_ACCS_MASK;
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}
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}
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void mmuInit(void) {
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void mmuInit(void) {
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mmuReset();
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mmuReset();
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