OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [sim/] [mmu.c] - Diff between revs 168 and 202

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 168 Rev 202
Line 26... Line 26...
static Word tlbEntryHi;
static Word tlbEntryHi;
static Word tlbEntryLo;
static Word tlbEntryLo;
static Word mmuBadAddr;
static Word mmuBadAddr;
static Word mmuBadAccs;
static Word mmuBadAccs;
 
 
 
static int randomIndex;
 
 
 
 
 
static void updateRandomIndex(void) {
 
  if (randomIndex == TLB_FIXED) {
 
    randomIndex = TLB_MASK;
 
  } else {
 
    randomIndex--;
 
  }
 
}
 
 
 
 
static int assoc(Word page) {
static int assoc(Word page) {
  int n, i;
  int n, i;
 
 
  n = -1;
  n = -1;
Line 62... Line 73...
       addresses but not experienced with unmapped addresses */
       addresses but not experienced with unmapped addresses */
    assoc(0);
    assoc(0);
    pAddr = vAddr & ~0xC0000000;
    pAddr = vAddr & ~0xC0000000;
  } else {
  } else {
    /* mapped address space */
    /* mapped address space */
 
    updateRandomIndex();
    page = vAddr & PAGE_MASK;
    page = vAddr & PAGE_MASK;
    offset = vAddr & OFFSET_MASK;
    offset = vAddr & OFFSET_MASK;
    index = assoc(page);
    index = assoc(page);
    if (index == -1) {
    if (index == -1) {
      /* TLB miss exception */
      /* TLB miss exception */
Line 215... Line 227...
 
 
void mmuTbwr(void) {
void mmuTbwr(void) {
  int index;
  int index;
 
 
  /* choose a random index, but don't touch fixed entries */
  /* choose a random index, but don't touch fixed entries */
  do {
  index = randomIndex;
    index = rand() & TLB_MASK;
 
  } while (index < TLB_FIXED);
 
  tlb[index].page = tlbEntryHi & PAGE_MASK;
  tlb[index].page = tlbEntryHi & PAGE_MASK;
  tlb[index].frame = tlbEntryLo & PAGE_MASK;
  tlb[index].frame = tlbEntryLo & PAGE_MASK;
  tlb[index].write = tlbEntryLo & TLB_WRITE ? true : false;
  tlb[index].write = tlbEntryLo & TLB_WRITE ? true : false;
  tlb[index].valid = tlbEntryLo & TLB_VALID ? true : false;
  tlb[index].valid = tlbEntryLo & TLB_VALID ? true : false;
  if (debugWrite) {
  if (debugWrite) {
Line 301... Line 311...
  tlbIndex = rand() & TLB_MASK;
  tlbIndex = rand() & TLB_MASK;
  tlbEntryHi = rand() & PAGE_MASK;
  tlbEntryHi = rand() & PAGE_MASK;
  tlbEntryLo = rand() & (PAGE_MASK | TLB_WRITE | TLB_VALID);
  tlbEntryLo = rand() & (PAGE_MASK | TLB_WRITE | TLB_VALID);
  mmuBadAddr = rand();
  mmuBadAddr = rand();
  mmuBadAccs = rand() & MMU_ACCS_MASK;
  mmuBadAccs = rand() & MMU_ACCS_MASK;
 
  randomIndex = TLB_MASK;
}
}
 
 
 
 
void mmuInit(void) {
void mmuInit(void) {
  mmuReset();
  mmuReset();

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.