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[/] [ethernet_tri_mode/] [tags/] [rel-1-0/] [rtl/] [verilog/] [MAC_tx.v] - Diff between revs 6 and 7

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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//                                                                    
//                                                                    
// CVS Revision History                                               
// CVS Revision History                                               
//                                                                    
//                                                                    
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.2  2005/12/16 06:44:14  Administrator
 
// replaced tab with space.
 
// passed 9.6k length frame test.
 
//
// Revision 1.1.1.1  2005/12/13 01:51:44  Administrator
// Revision 1.1.1.1  2005/12/13 01:51:44  Administrator
// no message
// no message
//   
//   
module MAC_tx(
module MAC_tx(
input                   Reset                   ,
input                   Reset                   ,
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.xoff_gen_complete            (xoff_gen_complete          ),
.xoff_gen_complete            (xoff_gen_complete          ),
.xon_gen                      (xon_gen                ),
.xon_gen                      (xon_gen                ),
.xon_gen_complete             (xon_gen_complete       )
.xon_gen_complete             (xon_gen_complete       )
);
);
 
 
 
`ifdef MAC_SOURCE_REPLACE_EN
MAC_tx_addr_add U_MAC_tx_addr_add(
MAC_tx_addr_add U_MAC_tx_addr_add(
.Reset                                    (Reset                                  ),
.Reset                                    (Reset                                  ),
.Clk                      (Clk                    ),
.Clk                      (Clk                    ),
.MAC_tx_addr_rd           (MAC_tx_addr_rd             ),
.MAC_tx_addr_rd           (MAC_tx_addr_rd             ),
.MAC_tx_addr_init         (MAC_tx_addr_init       ),
.MAC_tx_addr_init         (MAC_tx_addr_init       ),
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 //CPU                    (//CPU                  ),
 //CPU                    (//CPU                  ),
.MAC_add_prom_data            (MAC_add_prom_data          ),
.MAC_add_prom_data            (MAC_add_prom_data          ),
.MAC_add_prom_add             (MAC_add_prom_add       ),
.MAC_add_prom_add             (MAC_add_prom_add       ),
.MAC_add_prom_wr                  (MAC_add_prom_wr            )
.MAC_add_prom_wr                  (MAC_add_prom_wr            )
);
);
 
`else
 
assign MAC_tx_addr_data=0;
 
`endif
MAC_tx_FF U_MAC_tx_FF(
MAC_tx_FF U_MAC_tx_FF(
.Reset                                    (Reset                                  ),
.Reset                                    (Reset                                  ),
.Clk_MAC                                  (Clk                                    ),
.Clk_MAC                                  (Clk                                    ),
.Clk_SYS                                  (Clk_user                               ),
.Clk_SYS                                  (Clk_user                               ),
 //MAC_rx_ctrl interf     (//MAC_rx_ctrl interf   ),
 //MAC_rx_ctrl interf     (//MAC_rx_ctrl interf   ),

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