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[/] [ethmac/] [tags/] [rel_2/] [rtl/] [verilog/] [eth_defines.v] - Diff between revs 55 and 67
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Rev 67 |
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.12 2002/02/15 10:58:31 mohor
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// Changed that were lost with last update put back to the file.
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//
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// Revision 1.11 2002/02/14 20:19:41 billditt
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// Revision 1.11 2002/02/14 20:19:41 billditt
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// Modified for Address Checking,
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// Modified for Address Checking,
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// addition of eth_addrcheck.v
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// addition of eth_addrcheck.v
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//
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//
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// Revision 1.10 2002/02/12 17:01:19 mohor
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// Revision 1.10 2002/02/12 17:01:19 mohor
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//
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//
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//
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//
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//
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//
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//`define WISHBONE_DMA // Using DMA
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//`define EXTERNAL_DMA // Using DMA
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// Selection of the used memory
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// Selection of the used memory
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//`define XILINX_RAMB4 // Core is going to be implemented in Virtex FPGA and contains Virtex
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//`define XILINX_RAMB4 // Core is going to be implemented in Virtex FPGA and contains Virtex
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// specific elements.
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// specific elements.
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