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[/] [ethmac/] [tags/] [rel_25/] [bench/] [verilog/] [wb_model_defines.v] - Diff between revs 170 and 315
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.2 2002/09/13 12:29:14 mohor
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// Headers changed.
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//
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//
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// WISHBONE frequency in GHz
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// WISHBONE frequency in GHz
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// some common types and defines
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// some common types and defines
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`define WB_ADDR_WIDTH 32
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`define WB_ADDR_WIDTH 32
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`define WB_DATA_WIDTH 32
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`define WB_DATA_WIDTH 32
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`define WB_SEL_WIDTH `WB_DATA_WIDTH/8
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`define WB_SEL_WIDTH `WB_DATA_WIDTH/8
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`define WB_TAG_WIDTH 1
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`define WB_TAG_WIDTH 5
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`define WB_ADDR_TYPE [(`WB_ADDR_WIDTH - 1):0]
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`define WB_ADDR_TYPE [(`WB_ADDR_WIDTH - 1):0]
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`define WB_DATA_TYPE [(`WB_DATA_WIDTH - 1):0]
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`define WB_DATA_TYPE [(`WB_DATA_WIDTH - 1):0]
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`define WB_SEL_TYPE [(`WB_SEL_WIDTH - 1):0]
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`define WB_SEL_TYPE [(`WB_SEL_WIDTH - 1):0]
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`define WB_TAG_TYPE [(`WB_TAG_WIDTH - 1):0]
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`define WB_TAG_TYPE [(`WB_TAG_WIDTH - 1):0]
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