| Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.46 2003/01/30 13:30:22 tadejm
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// Defer indication changed.
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//
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// Revision 1.45 2003/01/22 13:49:26 tadejm
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// Revision 1.45 2003/01/22 13:49:26 tadejm
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// When control packets were received, they were ignored in some cases.
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// When control packets were received, they were ignored in some cases.
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//
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//
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// Revision 1.44 2003/01/21 12:09:40 mohor
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// Revision 1.44 2003/01/21 12:09:40 mohor
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// When receiving normal data frame and RxFlow control was switched on, RXB
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// When receiving normal data frame and RxFlow control was switched on, RXB
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| Line 569... |
Line 572... |
reg CarrierSense_Tx2;
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reg CarrierSense_Tx2;
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reg Collision_Tx1;
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reg Collision_Tx1;
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reg Collision_Tx2;
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reg Collision_Tx2;
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reg RxEnSync; // Synchronized Receive Enable
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reg RxEnSync; // Synchronized Receive Enable
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reg CarrierSense_Rx1;
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//reg CarrierSense_Rx1;
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reg RxCarrierSense; // Synchronized CarrierSense (to Rx clock)
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//reg RxCarrierSense; // Synchronized CarrierSense (to Rx clock)
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reg WillTransmit_q;
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reg WillTransmit_q;
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reg WillTransmit_q2;
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reg WillTransmit_q2;
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| Line 682... |
Line 685... |
assign Collision = ~r_FullD & Collision_Tx2;
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assign Collision = ~r_FullD & Collision_Tx2;
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// Carrier sense is synchronized to receive clock.
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// Carrier sense is synchronized to receive clock.
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always @ (posedge mrx_clk_pad_i or posedge wb_rst_i)
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//always @ (posedge mrx_clk_pad_i or posedge wb_rst_i)
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begin
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//begin
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if(wb_rst_i)
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// if(wb_rst_i)
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begin
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// begin
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CarrierSense_Rx1 <= #Tp 1'h0;
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// CarrierSense_Rx1 <= #Tp 1'h0;
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RxCarrierSense <= #Tp 1'h0;
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// RxCarrierSense <= #Tp 1'h0;
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end
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// end
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else
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// else
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begin
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// begin
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CarrierSense_Rx1 <= #Tp mcrs_pad_i;
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// CarrierSense_Rx1 <= #Tp mcrs_pad_i;
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RxCarrierSense <= #Tp CarrierSense_Rx1;
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// RxCarrierSense <= #Tp CarrierSense_Rx1;
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end
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// end
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end
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//end
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// Delayed WillTransmit
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// Delayed WillTransmit
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always @ (posedge mrx_clk_pad_i)
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always @ (posedge mrx_clk_pad_i)
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begin
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begin
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| Line 715... |
Line 718... |
always @ (posedge mrx_clk_pad_i or posedge wb_rst_i)
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always @ (posedge mrx_clk_pad_i or posedge wb_rst_i)
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begin
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begin
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if(wb_rst_i)
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if(wb_rst_i)
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RxEnSync <= #Tp 1'b0;
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RxEnSync <= #Tp 1'b0;
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else
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else
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if(~RxCarrierSense | RxCarrierSense & Transmitting)
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//if(~RxCarrierSense | RxCarrierSense & Transmitting)
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if(~mrxdv_pad_i)
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RxEnSync <= #Tp r_RxEn;
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RxEnSync <= #Tp r_RxEn;
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end
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end
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