URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [bench/] [verilog/] [tb_ethernet_with_cop.v] - Diff between revs 216 and 227

Rev 216	Rev 227
Line 39...	Line 39...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.2 2002/10/11 13:29:28 mohor`
	`// Bist signals added.`
	`//`
`// Revision 1.1 2002/09/18 16:40:40 mohor`	`// Revision 1.1 2002/09/18 16:40:40 mohor`
`// Simple testbench that includes eth_cop, eth_host and eth_memory modules.`	`// Simple testbench that includes eth_cop, eth_host and eth_memory modules.`
`// This testbench is used for testing the whole environment. Use tb_ethernet`	`// This testbench is used for testing the whole environment. Use tb_ethernet`
`// testbench for testing just the ethernet MAC core (many tests).`	`// testbench for testing just the ethernet MAC core (many tests).`
`//`	`//`
Line 185...	Line 188...

`.int_o()`	`.int_o()`

`// Bist`	`// Bist`
`ifdef ETH_BIST	`ifdef ETH_BIST
`, .trst(1'b0), .SO(), .SI(1'b0), .shift_DR(1'b0), .capture_DR(1'b0), .extest(1'b0), .tck(1'b0)`	`,`
	`.scanb_rst (1'b0),`
	`.scanb_clk (1'b0),`
	`.scanb_si (1'b0),`
	`.scanb_so (),`
	`.scanb_en (1'b0)`
`endif	`endif

`);`	`);`