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https://opencores.org/ocsvn/ethmac/ethmac/trunk
[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_macstatus.v] - Diff between revs 70 and 101
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| Rev 70 |
Rev 101 |
| Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.8 2002/02/18 10:40:17 mohor
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// Small fixes.
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//
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// Revision 1.7 2002/02/15 17:07:39 mohor
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// Revision 1.7 2002/02/15 17:07:39 mohor
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// Status was not written correctly when frames were discarted because of
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// Status was not written correctly when frames were discarted because of
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// address mismatch.
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// address mismatch.
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//
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//
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// Revision 1.6 2002/02/11 09:18:21 mohor
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// Revision 1.6 2002/02/11 09:18:21 mohor
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// ReceivedPacketGood
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// ReceivedPacketGood
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assign ReceivedPacketGood = ~LatchedCrcError & ~LatchedMRxErr;
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assign ReceivedPacketGood = ~LatchedCrcError & ~LatchedMRxErr;
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// ReceivedLengthOK
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// ReceivedLengthOK
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assign ReceivedLengthOK = RxByteCnt[15:0] > 63 & RxByteCnt[15:0] < 1519;
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assign ReceivedLengthOK = RxByteCnt[15:0] >= r_MinFL[15:0] & RxByteCnt[15:0] <= r_MaxFL[15:0];
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Line 293... |
else
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else
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if(LoadRxStatus)
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if(LoadRxStatus)
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ShortFrame <=#Tp 1'b0;
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ShortFrame <=#Tp 1'b0;
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else
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else
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if(TakeSample)
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if(TakeSample)
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ShortFrame <=#Tp r_RecSmall & RxByteCnt[15:0] < r_MinFL[15:0];
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ShortFrame <=#Tp RxByteCnt[15:0] < r_MinFL[15:0];
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end
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end
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// DribbleNibble
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// DribbleNibble
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reg DribbleNibble;
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reg DribbleNibble;
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