| Line 124... |
Line 124... |
r_FullD
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r_FullD
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);
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);
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parameter Tp = 1;
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input MRxClk;
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input MRxClk;
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input Reset;
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input Reset;
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input RxCrcError;
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input RxCrcError;
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input MRxErr;
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input MRxErr;
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| Line 203... |
Line 201... |
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// Crc error
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// Crc error
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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LatchedCrcError <=#Tp 1'b0;
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LatchedCrcError <= 1'b0;
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else
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else
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if(RxStateSFD)
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if(RxStateSFD)
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LatchedCrcError <=#Tp 1'b0;
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LatchedCrcError <= 1'b0;
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else
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else
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if(RxStateData[0])
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if(RxStateData[0])
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LatchedCrcError <=#Tp RxCrcError & ~RxByteCntEq0;
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LatchedCrcError <= RxCrcError & ~RxByteCntEq0;
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end
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end
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// LatchedMRxErr
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// LatchedMRxErr
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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LatchedMRxErr <=#Tp 1'b0;
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LatchedMRxErr <= 1'b0;
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else
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else
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if(MRxErr & MRxDV & (RxStatePreamble | RxStateSFD | (|RxStateData) | RxStateIdle & ~Transmitting))
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if(MRxErr & MRxDV & (RxStatePreamble | RxStateSFD | (|RxStateData) | RxStateIdle & ~Transmitting))
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LatchedMRxErr <=#Tp 1'b1;
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LatchedMRxErr <= 1'b1;
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else
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else
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LatchedMRxErr <=#Tp 1'b0;
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LatchedMRxErr <= 1'b0;
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end
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end
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// ReceivedPacketGood
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// ReceivedPacketGood
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assign ReceivedPacketGood = ~LatchedCrcError;
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assign ReceivedPacketGood = ~LatchedCrcError;
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| Line 247... |
Line 245... |
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// LoadRxStatus
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// LoadRxStatus
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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LoadRxStatus <=#Tp 1'b0;
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LoadRxStatus <= 1'b0;
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else
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else
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LoadRxStatus <=#Tp TakeSample;
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LoadRxStatus <= TakeSample;
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end
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end
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// ReceiveEnd
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// ReceiveEnd
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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ReceiveEnd <=#Tp 1'b0;
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ReceiveEnd <= 1'b0;
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else
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else
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ReceiveEnd <=#Tp LoadRxStatus;
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ReceiveEnd <= LoadRxStatus;
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end
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end
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// Invalid Symbol received during 100Mbps mode
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// Invalid Symbol received during 100Mbps mode
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assign SetInvalidSymbol = MRxDV & MRxErr & MRxD[3:0] == 4'he;
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assign SetInvalidSymbol = MRxDV & MRxErr & MRxD[3:0] == 4'he;
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| Line 272... |
Line 270... |
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// InvalidSymbol
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// InvalidSymbol
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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InvalidSymbol <=#Tp 1'b0;
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InvalidSymbol <= 1'b0;
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else
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else
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if(LoadRxStatus & ~SetInvalidSymbol)
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if(LoadRxStatus & ~SetInvalidSymbol)
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InvalidSymbol <=#Tp 1'b0;
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InvalidSymbol <= 1'b0;
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else
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else
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if(SetInvalidSymbol)
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if(SetInvalidSymbol)
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InvalidSymbol <=#Tp 1'b1;
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InvalidSymbol <= 1'b1;
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end
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end
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// Late Collision
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// Late Collision
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| Line 290... |
Line 288... |
reg RxColWindow;
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reg RxColWindow;
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// Collision Window
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// Collision Window
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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RxLateCollision <=#Tp 1'b0;
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RxLateCollision <= 1'b0;
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else
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else
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if(LoadRxStatus)
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if(LoadRxStatus)
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RxLateCollision <=#Tp 1'b0;
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RxLateCollision <= 1'b0;
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else
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else
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if(Collision & (~r_FullD) & (~RxColWindow | r_RecSmall))
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if(Collision & (~r_FullD) & (~RxColWindow | r_RecSmall))
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RxLateCollision <=#Tp 1'b1;
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RxLateCollision <= 1'b1;
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end
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end
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// Collision Window
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// Collision Window
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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RxColWindow <=#Tp 1'b1;
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RxColWindow <= 1'b1;
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else
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else
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if(~Collision & RxByteCnt[5:0] == CollValid[5:0] & RxStateData[1])
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if(~Collision & RxByteCnt[5:0] == CollValid[5:0] & RxStateData[1])
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RxColWindow <=#Tp 1'b0;
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RxColWindow <= 1'b0;
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else
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else
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if(RxStateIdle)
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if(RxStateIdle)
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RxColWindow <=#Tp 1'b1;
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RxColWindow <= 1'b1;
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end
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end
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// ShortFrame
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// ShortFrame
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reg ShortFrame;
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reg ShortFrame;
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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ShortFrame <=#Tp 1'b0;
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ShortFrame <= 1'b0;
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else
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else
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if(LoadRxStatus)
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if(LoadRxStatus)
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ShortFrame <=#Tp 1'b0;
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ShortFrame <= 1'b0;
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else
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else
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if(TakeSample)
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if(TakeSample)
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ShortFrame <=#Tp RxByteCnt[15:0] < r_MinFL[15:0];
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ShortFrame <= RxByteCnt[15:0] < r_MinFL[15:0];
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end
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end
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// DribbleNibble
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// DribbleNibble
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reg DribbleNibble;
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reg DribbleNibble;
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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DribbleNibble <=#Tp 1'b0;
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DribbleNibble <= 1'b0;
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else
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else
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if(RxStateSFD)
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if(RxStateSFD)
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DribbleNibble <=#Tp 1'b0;
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DribbleNibble <= 1'b0;
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else
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else
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if(~MRxDV & RxStateData[1])
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if(~MRxDV & RxStateData[1])
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DribbleNibble <=#Tp 1'b1;
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DribbleNibble <= 1'b1;
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end
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end
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reg ReceivedPacketTooBig;
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reg ReceivedPacketTooBig;
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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ReceivedPacketTooBig <=#Tp 1'b0;
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ReceivedPacketTooBig <= 1'b0;
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else
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else
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if(LoadRxStatus)
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if(LoadRxStatus)
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ReceivedPacketTooBig <=#Tp 1'b0;
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ReceivedPacketTooBig <= 1'b0;
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else
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else
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if(TakeSample)
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if(TakeSample)
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ReceivedPacketTooBig <=#Tp ~r_HugEn & RxByteCnt[15:0] > r_MaxFL[15:0];
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ReceivedPacketTooBig <= ~r_HugEn & RxByteCnt[15:0] > r_MaxFL[15:0];
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end
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end
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// Latched Retry counter for tx status
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// Latched Retry counter for tx status
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always @ (posedge MTxClk or posedge Reset)
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always @ (posedge MTxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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RetryCntLatched <=#Tp 4'h0;
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RetryCntLatched <= 4'h0;
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else
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else
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if(StartTxDone | StartTxAbort)
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if(StartTxDone | StartTxAbort)
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RetryCntLatched <=#Tp RetryCnt;
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RetryCntLatched <= RetryCnt;
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end
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end
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// Latched Retransmission limit
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// Latched Retransmission limit
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always @ (posedge MTxClk or posedge Reset)
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always @ (posedge MTxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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RetryLimit <=#Tp 1'h0;
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RetryLimit <= 1'h0;
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else
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else
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if(StartTxDone | StartTxAbort)
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if(StartTxDone | StartTxAbort)
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RetryLimit <=#Tp MaxCollisionOccured;
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RetryLimit <= MaxCollisionOccured;
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end
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end
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// Latched Late Collision
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// Latched Late Collision
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always @ (posedge MTxClk or posedge Reset)
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always @ (posedge MTxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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LateCollLatched <=#Tp 1'b0;
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LateCollLatched <= 1'b0;
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else
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else
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if(StartTxDone | StartTxAbort)
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if(StartTxDone | StartTxAbort)
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LateCollLatched <=#Tp LateCollision;
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LateCollLatched <= LateCollision;
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end
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end
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// Latched Defer state
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// Latched Defer state
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always @ (posedge MTxClk or posedge Reset)
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always @ (posedge MTxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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DeferLatched <=#Tp 1'b0;
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DeferLatched <= 1'b0;
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else
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else
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if(DeferIndication)
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if(DeferIndication)
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DeferLatched <=#Tp 1'b1;
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DeferLatched <= 1'b1;
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else
|
else
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if(RstDeferLatched)
|
if(RstDeferLatched)
|
DeferLatched <=#Tp 1'b0;
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DeferLatched <= 1'b0;
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end
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end
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// CarrierSenseLost
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// CarrierSenseLost
|
always @ (posedge MTxClk or posedge Reset)
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always @ (posedge MTxClk or posedge Reset)
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begin
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begin
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if(Reset)
|
if(Reset)
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CarrierSenseLost <=#Tp 1'b0;
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CarrierSenseLost <= 1'b0;
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else
|
else
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if((StatePreamble | (|StateData)) & ~CarrierSense & ~Loopback & ~Collision & ~r_FullD)
|
if((StatePreamble | (|StateData)) & ~CarrierSense & ~Loopback & ~Collision & ~r_FullD)
|
CarrierSenseLost <=#Tp 1'b1;
|
CarrierSenseLost <= 1'b1;
|
else
|
else
|
if(TxStartFrm)
|
if(TxStartFrm)
|
CarrierSenseLost <=#Tp 1'b0;
|
CarrierSenseLost <= 1'b0;
|
end
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end
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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