| Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.20 2002/09/04 18:40:25 mohor
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// ETH_TXCTRL and ETH_RXCTRL registers added. Interrupts related to
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// the control frames connected.
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//
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// Revision 1.19 2002/08/19 16:01:40 mohor
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// Revision 1.19 2002/08/19 16:01:40 mohor
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// Only values smaller or equal to 0x80 can be written to TX_BD_NUM register.
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// Only values smaller or equal to 0x80 can be written to TX_BD_NUM register.
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// r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.
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// r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.
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//
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//
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// Revision 1.18 2002/08/16 22:28:23 mohor
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// Revision 1.18 2002/08/16 22:28:23 mohor
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| Line 141... |
Line 145... |
r_MiiMRst, r_MiiNoPre, r_ClkDiv, r_WCtrlData, r_RStat, r_ScanStat,
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r_MiiMRst, r_MiiNoPre, r_ClkDiv, r_WCtrlData, r_RStat, r_ScanStat,
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r_RGAD, r_FIAD, r_CtrlData, NValid_stat, Busy_stat,
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r_RGAD, r_FIAD, r_CtrlData, NValid_stat, Busy_stat,
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LinkFail, r_MAC, WCtrlDataStart, RStatStart,
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LinkFail, r_MAC, WCtrlDataStart, RStatStart,
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UpdateMIIRX_DATAReg, Prsd, r_TxBDNum, TX_BD_NUM_Wr, int_o,
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UpdateMIIRX_DATAReg, Prsd, r_TxBDNum, TX_BD_NUM_Wr, int_o,
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r_HASH0, r_HASH1, r_TxPauseTV, r_TxPauseRq, RstTxPauseRq, TxCtrlEndFrm,
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r_HASH0, r_HASH1, r_TxPauseTV, r_TxPauseRq, RstTxPauseRq, TxCtrlEndFrm,
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StartTxDone, TxClk, RxClk, ReceivedPauseFrm,
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StartTxDone, TxClk, RxClk, ReceivedPauseFrm
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reg1, reg2, reg3, reg4
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);
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);
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parameter Tp = 1;
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parameter Tp = 1;
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input [31:0] reg1, reg2, reg3, reg4;
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input [31:0] DataIn;
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input [31:0] DataIn;
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input [7:0] Address;
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input [7:0] Address;
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input Rw;
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input Rw;
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input Cs;
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input Cs;
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| Line 607... |
Line 608... |
INT_MASKOut or IPGTOut or IPGR1Out or IPGR2Out or
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INT_MASKOut or IPGTOut or IPGR1Out or IPGR2Out or
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PACKETLENOut or COLLCONFOut or CTRLMODEROut or MIIMODEROut or
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PACKETLENOut or COLLCONFOut or CTRLMODEROut or MIIMODEROut or
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MIICOMMANDOut or MIIADDRESSOut or MIITX_DATAOut or MIIRX_DATAOut or
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MIICOMMANDOut or MIIADDRESSOut or MIITX_DATAOut or MIIRX_DATAOut or
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MIISTATUSOut or MAC_ADDR0Out or MAC_ADDR1Out or TX_BD_NUMOut or
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MIISTATUSOut or MAC_ADDR0Out or MAC_ADDR1Out or TX_BD_NUMOut or
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HASH0Out or HASH1Out or TXCTRLOut or RXCTRLOut
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HASH0Out or HASH1Out or TXCTRLOut or RXCTRLOut
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or reg1 or reg2 or reg3 or reg4
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)
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)
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begin
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begin
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if(Read) // read
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if(Read) // read
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begin
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begin
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case(Address)
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case(Address)
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| Line 636... |
Line 636... |
`ETH_HASH0_ADR : DataOut<=HASH0Out;
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`ETH_HASH0_ADR : DataOut<=HASH0Out;
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`ETH_HASH1_ADR : DataOut<=HASH1Out;
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`ETH_HASH1_ADR : DataOut<=HASH1Out;
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`ETH_TX_CTRL_ADR : DataOut<=TXCTRLOut;
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`ETH_TX_CTRL_ADR : DataOut<=TXCTRLOut;
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`ETH_RX_CTRL_ADR : DataOut<=RXCTRLOut;
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`ETH_RX_CTRL_ADR : DataOut<=RXCTRLOut;
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8'h16 /* 0x58 */ : DataOut<=reg1;
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8'h17 /* 0x5c */ : DataOut<=reg2;
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8'h18 /* 0x60 */ : DataOut<=reg3;
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8'h19 /* 0x64 */ : DataOut<=reg4;
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default: DataOut<=32'h0;
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default: DataOut<=32'h0;
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endcase
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endcase
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end
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end
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else
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else
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DataOut<=32'h0;
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DataOut<=32'h0;
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