Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.27 2004/04/26 11:42:17 igorm
|
|
// TX_BD_NUM_Wr error fixed. Error was entered with the last check-in.
|
|
//
|
// Revision 1.26 2003/11/12 18:24:59 tadejm
|
// Revision 1.26 2003/11/12 18:24:59 tadejm
|
// WISHBONE slave changed and tested from only 32-bit accesss to byte access.
|
// WISHBONE slave changed and tested from only 32-bit accesss to byte access.
|
//
|
//
|
// Revision 1.25 2003/04/18 16:26:25 mohor
|
// Revision 1.25 2003/04/18 16:26:25 mohor
|
// RxBDAddress was updated also when value to r_TxBDNum was written with
|
// RxBDAddress was updated also when value to r_TxBDNum was written with
|
Line 163... |
Line 166... |
r_IPGT, r_IPGR1, r_IPGR2, r_MinFL, r_MaxFL, r_MaxRet,
|
r_IPGT, r_IPGR1, r_IPGR2, r_MinFL, r_MaxFL, r_MaxRet,
|
r_CollValid, r_TxFlow, r_RxFlow, r_PassAll,
|
r_CollValid, r_TxFlow, r_RxFlow, r_PassAll,
|
r_MiiNoPre, r_ClkDiv, r_WCtrlData, r_RStat, r_ScanStat,
|
r_MiiNoPre, r_ClkDiv, r_WCtrlData, r_RStat, r_ScanStat,
|
r_RGAD, r_FIAD, r_CtrlData, NValid_stat, Busy_stat,
|
r_RGAD, r_FIAD, r_CtrlData, NValid_stat, Busy_stat,
|
LinkFail, r_MAC, WCtrlDataStart, RStatStart,
|
LinkFail, r_MAC, WCtrlDataStart, RStatStart,
|
UpdateMIIRX_DATAReg, Prsd, r_TxBDNum, TX_BD_NUM_Wr, int_o,
|
UpdateMIIRX_DATAReg, Prsd, r_TxBDNum, int_o,
|
r_HASH0, r_HASH1, r_TxPauseTV, r_TxPauseRq, RstTxPauseRq, TxCtrlEndFrm,
|
r_HASH0, r_HASH1, r_TxPauseTV, r_TxPauseRq, RstTxPauseRq, TxCtrlEndFrm,
|
StartTxDone, TxClk, RxClk, SetPauseTimer
|
StartTxDone, TxClk, RxClk, SetPauseTimer
|
);
|
);
|
|
|
parameter Tp = 1;
|
parameter Tp = 1;
|
Line 247... |
Line 250... |
input Busy_stat;
|
input Busy_stat;
|
input LinkFail;
|
input LinkFail;
|
|
|
output [47:0]r_MAC;
|
output [47:0]r_MAC;
|
output [7:0] r_TxBDNum;
|
output [7:0] r_TxBDNum;
|
output TX_BD_NUM_Wr;
|
|
output int_o;
|
output int_o;
|
output [15:0]r_TxPauseTV;
|
output [15:0]r_TxPauseTV;
|
output r_TxPauseRq;
|
output r_TxPauseRq;
|
input RstTxPauseRq;
|
input RstTxPauseRq;
|
input TxCtrlEndFrm;
|
input TxCtrlEndFrm;
|
Line 324... |
Line 326... |
wire [1:0] MAC_ADDR1_Wr;
|
wire [1:0] MAC_ADDR1_Wr;
|
wire [3:0] HASH0_Wr;
|
wire [3:0] HASH0_Wr;
|
wire [3:0] HASH1_Wr;
|
wire [3:0] HASH1_Wr;
|
wire [2:0] TXCTRL_Wr;
|
wire [2:0] TXCTRL_Wr;
|
wire [1:0] RXCTRL_Wr;
|
wire [1:0] RXCTRL_Wr;
|
|
wire [0:0] TX_BD_NUM_Wr;
|
|
|
assign MODER_Wr[0] = Write[0] & MODER_Sel;
|
assign MODER_Wr[0] = Write[0] & MODER_Sel;
|
assign MODER_Wr[1] = Write[1] & MODER_Sel;
|
assign MODER_Wr[1] = Write[1] & MODER_Sel;
|
assign MODER_Wr[2] = Write[2] & MODER_Sel;
|
assign MODER_Wr[2] = Write[2] & MODER_Sel;
|
assign INT_SOURCE_Wr[0] = Write[0] & INT_SOURCE_Sel;
|
assign INT_SOURCE_Wr[0] = Write[0] & INT_SOURCE_Sel;
|
Line 369... |
Line 372... |
assign TXCTRL_Wr[0] = Write[0] & TXCTRL_Sel;
|
assign TXCTRL_Wr[0] = Write[0] & TXCTRL_Sel;
|
assign TXCTRL_Wr[1] = Write[1] & TXCTRL_Sel;
|
assign TXCTRL_Wr[1] = Write[1] & TXCTRL_Sel;
|
assign TXCTRL_Wr[2] = Write[2] & TXCTRL_Sel;
|
assign TXCTRL_Wr[2] = Write[2] & TXCTRL_Sel;
|
assign RXCTRL_Wr[0] = Write[0] & RXCTRL_Sel;
|
assign RXCTRL_Wr[0] = Write[0] & RXCTRL_Sel;
|
assign RXCTRL_Wr[1] = Write[1] & RXCTRL_Sel;
|
assign RXCTRL_Wr[1] = Write[1] & RXCTRL_Sel;
|
assign TX_BD_NUM_Wr = Write[0] & TX_BD_NUM_Sel & (DataIn<='h80);
|
assign TX_BD_NUM_Wr[0] = Write[0] & TX_BD_NUM_Sel & (DataIn<='h80);
|
|
|
|
|
|
|
wire [31:0] MODEROut;
|
wire [31:0] MODEROut;
|
wire [31:0] INT_SOURCEOut;
|
wire [31:0] INT_SOURCEOut;
|
Line 539... |
Line 542... |
// TX_BD_NUM Register
|
// TX_BD_NUM Register
|
eth_register #(`ETH_TX_BD_NUM_WIDTH_0, `ETH_TX_BD_NUM_DEF_0) TX_BD_NUM_0
|
eth_register #(`ETH_TX_BD_NUM_WIDTH_0, `ETH_TX_BD_NUM_DEF_0) TX_BD_NUM_0
|
(
|
(
|
.DataIn (DataIn[`ETH_TX_BD_NUM_WIDTH_0 - 1:0]),
|
.DataIn (DataIn[`ETH_TX_BD_NUM_WIDTH_0 - 1:0]),
|
.DataOut (TX_BD_NUMOut[`ETH_TX_BD_NUM_WIDTH_0 - 1:0]),
|
.DataOut (TX_BD_NUMOut[`ETH_TX_BD_NUM_WIDTH_0 - 1:0]),
|
.Write (TX_BD_NUM_Wr),
|
.Write (TX_BD_NUM_Wr[0]),
|
.Clk (Clk),
|
.Clk (Clk),
|
.Reset (Reset),
|
.Reset (Reset),
|
.SyncReset (1'b0)
|
.SyncReset (1'b0)
|
);
|
);
|
assign TX_BD_NUMOut[31:`ETH_TX_BD_NUM_WIDTH_0] = 0;
|
assign TX_BD_NUMOut[31:`ETH_TX_BD_NUM_WIDTH_0] = 0;
|