URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_wishbone.v] - Diff between revs 77 and 80

Rev 77	Rev 80
Line 39...	Line 39...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.12 2002/02/26 16:22:07 mohor`
	`// Interrupts changed`
	`//`
`// Revision 1.11 2002/02/15 17:07:39 mohor`	`// Revision 1.11 2002/02/15 17:07:39 mohor`
`// Status was not written correctly when frames were discarted because of`	`// Status was not written correctly when frames were discarted because of`
`// address mismatch.`	`// address mismatch.`
`//`	`//`
`// Revision 1.10 2002/02/15 12:17:39 mohor`	`// Revision 1.10 2002/02/15 12:17:39 mohor`
Line 1845...	Line 1848...
`// bit 12 od rx je reserved`	`// bit 12 od rx je reserved`
`// bit 11 od rx je reserved`	`// bit 11 od rx je reserved`
`// bit 10 od rx je reserved`	`// bit 10 od rx je reserved`
`// bit 9 od rx je reserved`	`// bit 9 od rx je reserved`
`// bit 8 od rx je reserved`	`// bit 8 od rx je reserved`
`// bit 7 od rx je reserved`	`// bit 7 od rx je Miss still needs to be done`
`// bit 6 od rx je RxOverrun`	`// bit 6 od rx je RxOverrun`
`// bit 5 od rx je InvalidSymbol`	`// bit 5 od rx je InvalidSymbol`
`// bit 4 od rx je DribbleNibble`	`// bit 4 od rx je DribbleNibble`
`// bit 3 od rx je ReceivedPacketTooBig`	`// bit 3 od rx je ReceivedPacketTooBig`
`// bit 2 od rx je ShortFrame`	`// bit 2 od rx je ShortFrame`