URL https://opencores.org/ocsvn/ethmac10g/ethmac10g/trunk

Subversion Repositories ethmac10g

[/] [ethmac10g/] [trunk/] [rtl/] [verilog/] [rx_engine/] [rxReceiveEngine.v] - Diff between revs 39 and 41

Rev 39	Rev 41
Line 55...	Line 55...
`rx_bad_frame, rxCfgofRS, rxTxLinkFault);//, fcTxPauseData, fcTxPauseValid);`	`rx_bad_frame, rxCfgofRS, rxTxLinkFault);//, fcTxPauseData, fcTxPauseValid);`
`input rxclk_in; //Input clock of receive engine`	`input rxclk_in; //Input clock of receive engine`
`input reset_in; //Globle reset of receive engine`	`input reset_in; //Globle reset of receive engine`
`input [31:0] rxd_in; //XGMII RXD`	`input [31:0] rxd_in; //XGMII RXD`
`input [3:0] rxc_in; //XGMII RXC`	`input [3:0] rxc_in; //XGMII RXC`
`output [17:0] rxStatRegPlus; //Signals for statistics`	`output [18:0] rxStatRegPlus; //Signals for statistics`
`input [64:0] cfgRxRegData_in; //Signals for configuration`	`input [64:0] cfgRxRegData_in; //Signals for configuration`
`output [63:0] rx_data; //Received data sent to upper layer`	`output [63:0] rx_data; //Received data sent to upper layer`
`output [7:0] rx_data_valid; //Receive data valid indicator`	`output [7:0] rx_data_valid; //Receive data valid indicator`
`output rx_good_frame; //Indicate that a good frame has been received`	`output rx_good_frame; //Indicate that a good frame has been received`
`output rx_bad_frame; //Indicate that a bad frame has been received`	`output rx_bad_frame; //Indicate that a bad frame has been received`