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/*
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-- Arish Alreja: ECE 4902 Special Problems Spring 2006
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-- School of Electrical & Computer Engineering
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-- Georgia Institute of Technology
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-- Atlanta, GA 30332
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--
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-- 64 point FFT Processor
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--
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-- Address Generation Module */
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No newline at end of file
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No newline at end of file
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module agu(
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clk,
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en_fft,
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readmem_en,
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memwrite_en,
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agu_rd_addr0,
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agu_rd_addr1,
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agu_rd_addr2,
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agu_rd_addr3,
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agu_rd_addr4,
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agu_rd_addr5,
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agu_rd_addr6,
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agu_rd_addr7,
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agu_wr_addr0,
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agu_wr_addr1,
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agu_wr_addr2,
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agu_wr_addr3,
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agu_wr_addr4,
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agu_wr_addr5,
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agu_wr_addr6,
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agu_wr_addr7
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);
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input clk;
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input readmem_en;
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input memwrite_en;
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input en_fft;
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output [2:0] agu_rd_addr0;
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output [2:0] agu_rd_addr1;
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output [2:0] agu_rd_addr2;
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output [2:0] agu_rd_addr3;
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output [2:0] agu_rd_addr4;
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output [2:0] agu_rd_addr5;
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output [2:0] agu_rd_addr6;
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output [2:0] agu_rd_addr7;
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output [2:0] agu_wr_addr0;
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output [2:0] agu_wr_addr1;
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output [2:0] agu_wr_addr2;
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output [2:0] agu_wr_addr3;
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output [2:0] agu_wr_addr4;
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output [2:0] agu_wr_addr5;
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output [2:0] agu_wr_addr6;
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output [2:0] agu_wr_addr7;
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reg [3:0] counter_read;
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reg [3:0] counter_write;
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reg [2:0] agu_read [7:0];
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reg [2:0] agu_write [7:0];
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always @(posedge clk)
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begin
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if (en_fft)
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begin
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counter_read = 4'b0000;
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counter_write = 4'b0000;
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end
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end
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always @(negedge clk)
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begin
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if (readmem_en)
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begin
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case(counter_read)
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4'h0: begin
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agu_read[0]<=3'h0;
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agu_read[1]<=3'h1;
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agu_read[2]<=3'h2;
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agu_read[3]<=3'h3;
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agu_read[4]<=3'h4;
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agu_read[5]<=3'h5;
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agu_read[6]<=3'h6;
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agu_read[7]<=3'h7;
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end
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4'h1: begin
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agu_read[0]<=3'h7;
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agu_read[1]<=3'h0;
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agu_read[2]<=3'h1;
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agu_read[3]<=3'h2;
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agu_read[4]<=3'h3;
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agu_read[5]<=3'h4;
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agu_read[6]<=3'h5;
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agu_read[7]<=3'h6;
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end
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4'h2: begin
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agu_read[0]<=3'h6;
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agu_read[1]<=3'h7;
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agu_read[2]<=3'h0;
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agu_read[3]<=3'h1;
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agu_read[4]<=3'h2;
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agu_read[5]<=3'h3;
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agu_read[6]<=3'h4;
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agu_read[7]<=3'h5;
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end
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4'h3: begin
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agu_read[0]<=3'h5;
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agu_read[1]<=3'h6;
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agu_read[2]<=3'h7;
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agu_read[3]<=3'h0;
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agu_read[4]<=3'h1;
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agu_read[5]<=3'h2;
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agu_read[6]<=3'h3;
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agu_read[7]<=3'h4;
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end
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4'h4: begin
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agu_read[0]<=3'h4;
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agu_read[1]<=3'h5;
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agu_read[2]<=3'h6;
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agu_read[3]<=3'h7;
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agu_read[4]<=3'h0;
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agu_read[5]<=3'h1;
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agu_read[6]<=3'h2;
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agu_read[7]<=3'h3;
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end
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4'h5: begin
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agu_read[0]<=3'h3;
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agu_read[1]<=3'h4;
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agu_read[2]<=3'h5;
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agu_read[3]<=3'h6;
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agu_read[4]<=3'h7;
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agu_read[5]<=3'h0;
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agu_read[6]<=3'h1;
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agu_read[7]<=3'h2;
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end
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4'h6: begin
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agu_read[0]<=3'h2;
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agu_read[1]<=3'h3;
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agu_read[2]<=3'h4;
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agu_read[3]<=3'h5;
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agu_read[4]<=3'h6;
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agu_read[5]<=3'h7;
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agu_read[6]<=3'h0;
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agu_read[7]<=3'h1;
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end
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4'h7: begin
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agu_read[0]<=3'h1;
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agu_read[1]<=3'h2;
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agu_read[2]<=3'h3;
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agu_read[3]<=3'h4;
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agu_read[4]<=3'h5;
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agu_read[5]<=3'h6;
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agu_read[6]<=3'h7;
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agu_read[7]<=3'h0;
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end
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4'h8: begin
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agu_read[0]<=3'h0;
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agu_read[1]<=3'h0;
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agu_read[2]<=3'h0;
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agu_read[3]<=3'h0;
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agu_read[4]<=3'h0;
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agu_read[5]<=3'h0;
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agu_read[6]<=3'h0;
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agu_read[7]<=3'h0;
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end
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4'h9: begin
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agu_read[0]<=3'h1;
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agu_read[1]<=3'h1;
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agu_read[2]<=3'h1;
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agu_read[3]<=3'h1;
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agu_read[4]<=3'h1;
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agu_read[5]<=3'h1;
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agu_read[6]<=3'h1;
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agu_read[7]<=3'h1;
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end
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4'ha: begin
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agu_read[0]<=3'h2;
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agu_read[1]<=3'h2;
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agu_read[2]<=3'h2;
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agu_read[3]<=3'h2;
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agu_read[4]<=3'h2;
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agu_read[5]<=3'h2;
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agu_read[6]<=3'h2;
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agu_read[7]<=3'h2;
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end
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4'hb: begin
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agu_read[0]<=3'h3;
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agu_read[1]<=3'h3;
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agu_read[2]<=3'h3;
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agu_read[3]<=3'h3;
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agu_read[4]<=3'h3;
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agu_read[5]<=3'h3;
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agu_read[6]<=3'h3;
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agu_read[7]<=3'h3;
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end
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4'hc:begin
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agu_read[0]<=3'h4;
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agu_read[1]<=3'h4;
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agu_read[2]<=3'h4;
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agu_read[3]<=3'h4;
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agu_read[4]<=3'h4;
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agu_read[5]<=3'h4;
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agu_read[6]<=3'h4;
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agu_read[7]<=3'h4;
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end
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4'hd:begin
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agu_read[0]<=3'h5;
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agu_read[1]<=3'h5;
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agu_read[2]<=3'h5;
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agu_read[3]<=3'h5;
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agu_read[4]<=3'h5;
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agu_read[5]<=3'h5;
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agu_read[6]<=3'h5;
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agu_read[7]<=3'h5;
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end
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4'he:begin
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agu_read[0]<=3'h6;
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agu_read[1]<=3'h6;
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agu_read[2]<=3'h6;
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agu_read[3]<=3'h6;
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agu_read[4]<=3'h6;
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agu_read[5]<=3'h6;
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agu_read[6]<=3'h6;
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agu_read[7]<=3'h6;
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end
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4'hf:begin
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agu_read[0]<=3'h7;
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agu_read[1]<=3'h7;
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agu_read[2]<=3'h7;
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agu_read[3]<=3'h7;
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agu_read[4]<=3'h7;
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agu_read[5]<=3'h7;
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agu_read[6]<=3'h7;
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agu_read[7]<=3'h7;
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end
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endcase
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counter_read<=counter_read+1;
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end
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end
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always @(negedge clk)
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begin
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if (memwrite_en)
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begin
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case(counter_write)
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4'h0: begin
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agu_write[0]<=3'h0;
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agu_write[1]<=3'h1;
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agu_write[2]<=3'h2;
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agu_write[3]<=3'h3;
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agu_write[4]<=3'h4;
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agu_write[5]<=3'h5;
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agu_write[6]<=3'h6;
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agu_write[7]<=3'h7;
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end
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4'h1: begin
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agu_write[0]<=3'h7;
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agu_write[1]<=3'h0;
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agu_write[2]<=3'h1;
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agu_write[3]<=3'h2;
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agu_write[4]<=3'h3;
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agu_write[5]<=3'h4;
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agu_write[6]<=3'h5;
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agu_write[7]<=3'h6;
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end
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4'h2: begin
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agu_write[0]<=3'h6;
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agu_write[1]<=3'h7;
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agu_write[2]<=3'h0;
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agu_write[3]<=3'h1;
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agu_write[4]<=3'h2;
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agu_write[5]<=3'h3;
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agu_write[6]<=3'h4;
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agu_write[7]<=3'h5;
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end
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4'h3: begin
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agu_write[0]<=3'h5;
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agu_write[1]<=3'h6;
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agu_write[2]<=3'h7;
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agu_write[3]<=3'h0;
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agu_write[4]<=3'h1;
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agu_write[5]<=3'h2;
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agu_write[6]<=3'h3;
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agu_write[7]<=3'h4;
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end
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4'h4: begin
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agu_write[0]<=3'h4;
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agu_write[1]<=3'h5;
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agu_write[2]<=3'h6;
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agu_write[3]<=3'h7;
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agu_write[4]<=3'h0;
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agu_write[5]<=3'h1;
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agu_write[6]<=3'h2;
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agu_write[7]<=3'h3;
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end
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4'h5: begin
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agu_write[0]<=3'h3;
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agu_write[1]<=3'h4;
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agu_write[2]<=3'h5;
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agu_write[3]<=3'h6;
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agu_write[4]<=3'h7;
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agu_write[5]<=3'h0;
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agu_write[6]<=3'h1;
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agu_write[7]<=3'h2;
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end
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4'h6: begin
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agu_write[0]<=3'h2;
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agu_write[1]<=3'h3;
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agu_write[2]<=3'h4;
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agu_write[3]<=3'h5;
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agu_write[4]<=3'h6;
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agu_write[5]<=3'h7;
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agu_write[6]<=3'h0;
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agu_write[7]<=3'h1;
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end
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4'h7: begin
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agu_write[0]<=3'h1;
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agu_write[1]<=3'h2;
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agu_write[2]<=3'h3;
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agu_write[3]<=3'h4;
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agu_write[4]<=3'h5;
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agu_write[5]<=3'h6;
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agu_write[6]<=3'h7;
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agu_write[7]<=3'h0;
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end
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4'h8: begin
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agu_write[0]<=3'h0;
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agu_write[1]<=3'h0;
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agu_write[2]<=3'h0;
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agu_write[3]<=3'h0;
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agu_write[4]<=3'h0;
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agu_write[5]<=3'h0;
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agu_write[6]<=3'h0;
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agu_write[7]<=3'h0;
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end
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4'h9: begin
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agu_write[0]<=3'h1;
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agu_write[1]<=3'h1;
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agu_write[2]<=3'h1;
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agu_write[3]<=3'h1;
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agu_write[4]<=3'h1;
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agu_write[5]<=3'h1;
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agu_write[6]<=3'h1;
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agu_write[7]<=3'h1;
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end
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4'ha: begin
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agu_write[0]<=3'h2;
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agu_write[1]<=3'h2;
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agu_write[2]<=3'h2;
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agu_write[3]<=3'h2;
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agu_write[4]<=3'h2;
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agu_write[5]<=3'h2;
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agu_write[6]<=3'h2;
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agu_write[7]<=3'h2;
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end
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4'hb: begin
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agu_write[0]<=3'h3;
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agu_write[1]<=3'h3;
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agu_write[2]<=3'h3;
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agu_write[3]<=3'h3;
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agu_write[4]<=3'h3;
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agu_write[5]<=3'h3;
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agu_write[6]<=3'h3;
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agu_write[7]<=3'h3;
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end
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4'hc:begin
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agu_write[0]<=3'h4;
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agu_write[1]<=3'h4;
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agu_write[2]<=3'h4;
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agu_write[3]<=3'h4;
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agu_write[4]<=3'h4;
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agu_write[5]<=3'h4;
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agu_write[6]<=3'h4;
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agu_write[7]<=3'h4;
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end
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4'hd:begin
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agu_write[0]<=3'h5;
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agu_write[1]<=3'h5;
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agu_write[2]<=3'h5;
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agu_write[3]<=3'h5;
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agu_write[4]<=3'h5;
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agu_write[5]<=3'h5;
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agu_write[6]<=3'h5;
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agu_write[7]<=3'h5;
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end
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4'he:begin
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agu_write[0]<=3'h6;
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agu_write[1]<=3'h6;
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agu_write[2]<=3'h6;
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agu_write[3]<=3'h6;
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agu_write[4]<=3'h6;
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agu_write[5]<=3'h6;
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agu_write[6]<=3'h6;
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agu_write[7]<=3'h6;
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end
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4'hf:begin
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agu_write[0]<=3'h7;
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agu_write[1]<=3'h7;
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agu_write[2]<=3'h7;
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agu_write[3]<=3'h7;
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agu_write[4]<=3'h7;
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agu_write[5]<=3'h7;
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agu_write[6]<=3'h7;
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agu_write[7]<=3'h7;
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end
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endcase
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counter_write<=counter_write+1;
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end
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end
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assign agu_rd_addr0=agu_read[0];
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assign agu_rd_addr1=agu_read[1];
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assign agu_rd_addr2=agu_read[2];
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assign agu_rd_addr3=agu_read[3];
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assign agu_rd_addr4=agu_read[4];
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assign agu_rd_addr5=agu_read[5];
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assign agu_rd_addr6=agu_read[6];
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assign agu_rd_addr7=agu_read[7];
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assign agu_wr_addr0=agu_write[0];
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assign agu_wr_addr1=agu_write[1];
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assign agu_wr_addr2=agu_write[2];
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assign agu_wr_addr3=agu_write[3];
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assign agu_wr_addr4=agu_write[4];
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assign agu_wr_addr5=agu_write[5];
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assign agu_wr_addr6=agu_write[6];
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assign agu_wr_addr7=agu_write[7];
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endmodule
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