| Line 365... |
Line 365... |
wire [7:0] LEDnext;
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wire [7:0] LEDnext;
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|
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assign LEDS = LEDr;
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assign LEDS = LEDr;
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|
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wire clk_controlled;
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wire clk_controlled;
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wire usr_rst;
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always @(posedge clk_local)
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always @(posedge clk_local)
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begin
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begin
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DIP_r <= DIP;
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DIP_r <= DIP;
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end
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end
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| Line 381... |
Line 382... |
LEDr <= LEDnext;
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LEDr <= LEDnext;
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end
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end
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port_clkcntl clkcontrol (
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port_clkcntl clkcontrol (
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.clk(clk_local),
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.clk(clk_local),
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.rst(rst),
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.rst(rst_local),
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.en(ch2_wen),
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.en(ch2_wen),
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.in_data(ch2_out_data),
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.in_data(ch2_out_data),
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.in_sof(ch2_out_sof),
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.in_sof(ch2_out_sof),
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.in_eof(ch2_out_eof),
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.in_eof(ch2_out_eof),
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.in_src_rdy(ch2_out_src_rdy),
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.in_src_rdy(ch2_out_src_rdy),
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| Line 394... |
Line 395... |
.out_data(),
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.out_data(),
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.out_sof(),
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.out_sof(),
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.out_eof(),
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.out_eof(),
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.out_src_rdy(),
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.out_src_rdy(),
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.in_dst_rdy(ch2_out_dst_rdy),
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.in_dst_rdy(ch2_out_dst_rdy),
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.usr_clk_out(clk_controlled)
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.usr_clk_out(clk_controlled),
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.usr_rst_out(usr_rst)
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);
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);
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//-------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------
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// Sand Box Areas
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// Sand Box Areas
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//-------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------
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|
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port_blank pr_channel_5 (
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wire channel_rst;
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.clk(clk_local),
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assign channel_rst = rst_local & usr_rst;
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.rst(rst_local),
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.wen ( ch5_wen ),
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channel5 pr_channel_5 (
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.ren ( ch5_ren ),
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.clk(clk_controlled),
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.in_data ( ch5_out_data ), // Inport
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.rst(channel_rst),
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.in_sof ( ch5_out_sof ), // Inport
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.wen ( 1 ),
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.in_eof ( ch5_out_eof ), // Inport
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.ren ( 1 ),
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.in_src_rdy ( ch5_out_src_rdy ), // Inport
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.in_data ( ch5_out_data_l ), // Inport
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.in_sof ( ch5_out_sof_l ), // Inport
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.in_eof ( ch5_out_eof_l ), // Inport
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.in_src_rdy ( ch5_out_src_rdy_l ), // Inport
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.out_dst_rdy ( ch5_in_dst_rdy_l ), // Outport
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|
|
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// Outputs:
|
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.out_data ( ch5_in_data_l ), // Outport
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.out_sof ( ch5_in_sof_l ), // Outport
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.out_eof ( ch5_in_eof_l ), // Outport
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.out_src_rdy ( ch5_in_src_rdy_l ), // Outport
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.in_dst_rdy ( ch5_out_dst_rdy_l ) // Inport
|
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);
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|
|
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port_fifo pf_channel_5_to_interface (
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.rst(channel_rst),
|
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.in_clk(clk_controlled),
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.out_clk(clk_local),
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.in_data ( ch5_in_data_l ), // Inport
|
|
.in_sof ( ch5_in_sof_l ), // Inport
|
|
.in_eof ( ch5_in_eof_l ), // Inport
|
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.in_src_rdy ( ch5_in_src_rdy_l ), // Inport
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.out_dst_rdy ( ch5_in_dst_rdy ), // Outport
|
.out_dst_rdy ( ch5_in_dst_rdy ), // Outport
|
|
|
// Outputs:
|
// Outputs:
|
.out_data ( ch5_in_data ), // Outport
|
.out_data ( ch5_in_data ), // Outport
|
.out_sof ( ch5_in_sof ), // Outport
|
.out_sof ( ch5_in_sof ), // Outport
|
.out_eof ( ch5_in_eof ), // Outport
|
.out_eof ( ch5_in_eof ), // Outport
|
.out_src_rdy ( ch5_in_src_rdy ), // Outport
|
.out_src_rdy ( ch5_in_src_rdy ), // Outport
|
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.in_dst_rdy ( ch5_in_dst_rdy_l ) // Inport
|
|
);
|
|
|
|
port_fifo pf_channel_5_from_interface (
|
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.rst(channel_rst),
|
|
.in_clk(clk_local),
|
|
.out_clk(clk_controlled),
|
|
.in_data ( ch5_out_data ), // Inport
|
|
.in_sof ( ch5_out_sof ), // Inport
|
|
.in_eof ( ch5_out_eof ), // Inport
|
|
.in_src_rdy ( ch5_out_src_rdy ), // Inport
|
|
.out_dst_rdy ( ch5_out_dst_rdy_l ), // Outport
|
|
|
|
// Outputs:
|
|
.out_data ( ch5_out_data_l ), // Outport
|
|
.out_sof ( ch5_out_sof_l ), // Outport
|
|
.out_eof ( ch5_out_eof_l ), // Outport
|
|
.out_src_rdy ( ch5_out_src_rdy_l ), // Outport
|
.in_dst_rdy ( ch5_out_dst_rdy ) // Inport
|
.in_dst_rdy ( ch5_out_dst_rdy ) // Inport
|
);
|
);
|
|
|
port_blank pr_channel_6 (
|
|
|
channel6 pr_channel_6 (
|
.clk(clk_local),
|
.clk(clk_local),
|
.rst(rst_local),
|
.rst(channel_rst),
|
.wen ( ch6_wen ),
|
.wen ( ch6_wen ),
|
.ren ( ch6_ren ),
|
.ren ( ch6_ren ),
|
.in_data ( ch6_out_data ), // Inport
|
.in_data ( ch6_out_data ), // Inport
|
.in_sof ( ch6_out_sof ), // Inport
|
.in_sof ( ch6_out_sof ), // Inport
|
.in_eof ( ch6_out_eof ), // Inport
|
.in_eof ( ch6_out_eof ), // Inport
|
