| Line 46... |
Line 46... |
use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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use ieee.math_real.all;
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use ieee.math_real.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_misc.all;
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use ieee.std_logic_misc.all;
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use std.textio.all;
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use work.txt_util.all;
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-- fpu operations (fpu_op_i):
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-- ========================
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-- 000 = add,
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-- 001 = substract,
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-- 010 = multiply,
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-- 011 = divide,
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-- 100 = square root
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-- 101 = unused
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-- 110 = unused
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-- 111 = unused
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-- Rounding Mode:
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-- ==============
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-- 00 = round to nearest even(default),
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-- 01 = round to zero,
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-- 10 = round up,
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-- 11 = round down
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entity tb_fpu is
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entity tb_fpu is
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end tb_fpu;
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end tb_fpu;
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| Line 76... |
Line 94... |
start_i : in std_logic;
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start_i : in std_logic;
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ready_o : out std_logic
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ready_o : out std_logic
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);
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);
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end component;
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end component;
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component fpu_y
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port(
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clk : in std_logic ;
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fpu_op : in std_logic_vector (2 downto 0) ;
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opa : in std_logic_vector (31 downto 0) ;
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opb : in std_logic_vector (31 downto 0) ;
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rmode : in std_logic_vector (1 downto 0) ;
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div_by_zero : out std_logic ;
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fpout : out std_logic_vector (31 downto 0) ;
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ine : out std_logic ;
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inf : out std_logic ;
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overflow : out std_logic ;
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qnan : out std_logic ;
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snan : out std_logic ;
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underflow : out std_logic ;
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zero : out std_logic
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);
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end component;
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signal clk_i : std_logic:= '0';
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signal clk_i : std_logic:= '0';
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signal opa_i, opb_i : std_logic_vector(31 downto 0);
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signal opa_i, opb_i : std_logic_vector(31 downto 0);
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signal fpu_op_i : std_logic_vector(2 downto 0);
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signal fpu_op_i : std_logic_vector(2 downto 0);
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signal rmode_i : std_logic_vector(1 downto 0);
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signal rmode_i : std_logic_vector(1 downto 0);
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signal output_o : std_logic_vector(31 downto 0);
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signal output_o : std_logic_vector(31 downto 0);
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signal start_i, ready_o : std_logic ;
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signal start_i, ready_o : std_logic ;
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signal ine_o, overflow_o, underflow_o, div_zero_o, inf_o, zero_o, qnan_o, snan_o: std_logic;
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signal ine_o, overflow_o, underflow_o, div_zero_o, inf_o, zero_o, qnan_o, snan_o: std_logic;
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signal fpout_y : std_logic_vector (31 downto 0) ;
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signal ine_y, inf_y, overflow_y, qnan_y, snan_y, underflow_y, zero_y, div_by_zero_y : std_logic ;
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signal slv_out : std_logic_vector(31 downto 0);
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constant CLK_PERIOD :time := 10 ns; -- period of clk period
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constant CLK_PERIOD :time := 10 ns; -- period of clk period
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begin
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begin
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-- instantiate the fpu
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-- instantiate fpu
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i_fpu: fpu port map (
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i_fpu: fpu port map (
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clk_i => clk_i,
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clk_i => clk_i,
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opa_i => opa_i,
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opa_i => opa_i,
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opb_i => opb_i,
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opb_i => opb_i,
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fpu_op_i => fpu_op_i,
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fpu_op_i => fpu_op_i,
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| Line 131... |
Line 132... |
snan_o => snan_o,
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snan_o => snan_o,
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start_i => start_i,
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start_i => start_i,
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ready_o => ready_o);
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ready_o => ready_o);
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-- instantiate the fpu
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i_fpu_y: fpu_y port map (
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clk => clk_i,
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fpu_op => fpu_op_i,
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opa => opa_i,
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opb => opb_i,
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rmode => rmode_i,
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div_by_zero => div_by_zero_y,
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fpout => fpout_y,
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ine => ine_y,
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inf => inf_y,
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overflow => overflow_y,
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qnan => qnan_y,
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snan => snan_y,
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underflow => underflow_y,
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zero => zero_y);
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---------------------------------------------------------------------------
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---------------------------------------------------------------------------
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-- toggle clock
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-- toggle clock
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---------------------------------------------------------------------------
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---------------------------------------------------------------------------
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clk_i <= not(clk_i) after 5 ns;
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clk_i <= not(clk_i) after 5 ns;
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verify : process
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verify : process
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begin
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--The operands and results are in Hex format. The test vectors must be placed in a strict order for the verfication to work.
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file testcases_file: TEXT open read_mode is "testcases.txt"; --Name of the file containing the test cases.
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--************* Add/Substract Test Vectors****************
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000100000000000000000000000";
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opb_i <= "00000000100000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000110000000000000000000010";
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opb_i <= "00000000100000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "10000000000000000000000000000111";
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opb_i <= "10000000001111111111111111111000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000011111110100011111000101000";
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opb_i <= "00000111000101111000001111100110";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "10001100111110100011111000101000";
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opb_i <= "10001100111101111000001111100110";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000011111110100011111000101000";
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opb_i <= "01111111110000000000000000000001";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000011111110100011111000101000";
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opb_i <= "01111111100000000000000000000001";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000100100000000000000000010";
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opb_i <= "00000000100000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00100011001000000000000000000000";
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opb_i <= "00101001100100000000000000000100";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "01110011011100000000000000000011";
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opb_i <= "01101100100000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000000000011111111111111111";
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opb_i <= "00000000000000000000000000111111";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000111111111111111111111111111";
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opb_i <= "00000000000001000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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-- seeeeeeeefffffffffffffffffffffff
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wait for CLK_PERIOD; start_i <= '1'; opa_i <= "01110011011100000000000000000011";
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opb_i <= "01101100100000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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wait for CLK_PERIOD; start_i <= '1'; -- MIN #1
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-- seeeeeeeefffffffffffffffffffffff
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opa_i <= "00000000000000000000000000000000";
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opb_i <= "00000000000000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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wait for CLK_PERIOD; start_i <= '1'; -- MIN #2
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-- seeeeeeeefffffffffffffffffffffff
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opa_i <= "00000000000000000000000000000000";
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opb_i <= "00000000000000000000000000000001";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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wait for CLK_PERIOD; start_i <= '1'; -- MAX
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-- seeeeeeeefffffffffffffffffffffff
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opa_i <= "01111111011111111111111111111111";
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opb_i <= "00000000000000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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wait for CLK_PERIOD; start_i <= '1'; -- INF
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-- seeeeeeeefffffffffffffffffffffff
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opa_i <= "01111111100000000000000000000000";
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opb_i <= "00000000000000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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wait for CLK_PERIOD; start_i <= '1'; -- QNaN
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-- seeeeeeeefffffffffffffffffffffff
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opa_i <= "01111111111111111111111111111111";
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opb_i <= "00000000000000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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wait for CLK_PERIOD; start_i <= '1'; -- SNaN
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-- seeeeeeeefffffffffffffffffffffff
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opa_i <= "01111001111111111111111111111111";
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opb_i <= "01111111100000000000000000000001";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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wait for CLK_PERIOD; start_i <= '1'; -- inf + inf
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-- seeeeeeeefffffffffffffffffffffff
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opa_i <= "01111111100000000000000000000000";
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opb_i <= "01111111100000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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severity failure;
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wait for CLK_PERIOD; start_i <= '1'; -- -inf + inf
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-- seeeeeeeefffffffffffffffffffffff
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opa_i <= "11111111100000000000000000000000";
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opb_i <= "01111111100000000000000000000000";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o(30 downto 0)=fpout_y(30 downto 0) and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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|
severity failure;
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|
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--misc.
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-- seeeeeeeefffffffffffffffffffffff
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|
wait for CLK_PERIOD; start_i <= '1';
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opa_i <= "11110011011100000000000000000011";
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opb_i <= "00000000111111111111111111111111";
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fpu_op_i <= "000";
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rmode_i <= "00";
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wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
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assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
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report "Error!!!"
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|
severity failure;
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|
|
|
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-- substract--------------------
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|
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-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000100000000000000000000000";
|
|
opb_i <= "00000000100000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-------
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000110000000000000000000010";
|
|
opb_i <= "00000000100000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "10000000000000000000000000000111";
|
|
opb_i <= "10000000001111111111111111111000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000011111110100011111000101000";
|
|
opb_i <= "00000111000101111000001111100110";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "10001100111110100011111000101000";
|
|
opb_i <= "10001100111101111000001111100110";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000011111110100011111000101000";
|
|
opb_i <= "01111111110000000000000000000001";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000011111110100011111000101000";
|
|
opb_i <= "01111111100000000000000000000001";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000100100000000000000000010";
|
|
opb_i <= "00000000100000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00100011001000000000000000000000";
|
|
opb_i <= "00101001100100000000000000000100";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "01110011011100000000000000000011";
|
|
opb_i <= "01101100100000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000000000011111111111111111";
|
|
opb_i <= "00000000000000000000000000111111";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000111111111111111111111111111";
|
|
opb_i <= "00000000000001000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "01110011011100000000000000000011";
|
|
opb_i <= "01101100100000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
wait for CLK_PERIOD; start_i <= '1'; -- MIN #1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
opa_i <= "00000000000000000000000000000000";
|
|
opb_i <= "00000000000000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
wait for CLK_PERIOD; start_i <= '1'; -- MIN #2
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
opa_i <= "00000000000000000000000000000000";
|
|
opb_i <= "00000000000000000000000000000001";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
wait for CLK_PERIOD; start_i <= '1'; -- MAX
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
opa_i <= "01111111011111111111111111111111";
|
|
opb_i <= "00000000000000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
wait for CLK_PERIOD; start_i <= '1'; -- INF
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
opa_i <= "01111111100000000000000000000000";
|
|
opb_i <= "00000000000000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
wait for CLK_PERIOD; start_i <= '1'; -- QNaN
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
opa_i <= "01111111111111111111111111111111";
|
|
opb_i <= "00000000000000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
wait for CLK_PERIOD; start_i <= '1'; -- SNaN
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
opa_i <= "01111001111111111111111111111111";
|
|
opb_i <= "01111111100000000000000000000001";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
wait for CLK_PERIOD; start_i <= '1'; -- inf + inf
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
opa_i <= "01111111100000000000000000000000";
|
|
opb_i <= "01111111100000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
wait for CLK_PERIOD; start_i <= '1'; -- -inf + inf
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
opa_i <= "11111111100000000000000000000000";
|
|
opb_i <= "01111111100000000000000000000000";
|
|
fpu_op_i <= "001";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o(30 downto 0)=fpout_y(30 downto 0) and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
|
|
--************* Multiply Test Vectors************************************************************
|
|
|
|
-- round to nearset even
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000100000000000000000000000";
|
|
opb_i <= "00000000100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
variable file_line: line;
|
wait for CLK_PERIOD; start_i <= '1';
|
variable str_in: string(8 downto 1);
|
opa_i <= "01000000100000000000000000000000";
|
variable str_fpu_op: string(3 downto 1);
|
opb_i <= "01000000100000000000000000000000";
|
variable str_rmode: string(2 downto 1);
|
fpu_op_i <= "010";
|
begin
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- underflow = 1 when tiny(2^-127) and inexact
|
|
|
|
-- 2^-127x0.1 * 2^0x1.0 = 2^-127x0.1 (-127 in dn = -126)
|
---------------------------------------------------------------------------------------------------------------------------------------------------
|
-- seeeeeeeefffffffffffffffffffffff
|
---------------------------------------------------SoftFloat test vectors (10000 test cases for each operation) --------------------------------------------------------------------
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000010000000000000000000000";
|
|
opb_i <= "00111111100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-127x0.1 * 2^0x1.11 = 2^-127x0.1110
|
while not endfile(testcases_file) loop
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000010000000000000000000000";
|
|
opb_i <= "00111111111000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-127x0.1 * 2^-1x1.0 = 2^-127x0.01
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
wait for CLK_PERIOD; start_i <= '1';
|
opa_i <= "00000000010000000000000000000000";
|
|
opb_i <= "00111111000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-127x0.1 * 2^-22x1.0 = 2^-127x0.0..01
|
str_read(testcases_file,str_in);
|
-- seeeeeeeefffffffffffffffffffffff
|
opa_i <= strhex_to_slv(str_in);
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000010000000000000000000000";
|
|
opb_i <= "00110100100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-127x0.1 * 2^-45x1.0 = 2^-127x0.0..00
|
str_read(testcases_file,str_in);
|
-- seeeeeeeefffffffffffffffffffffff
|
opb_i <= strhex_to_slv(str_in);
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000010000000000000000000000";
|
|
opb_i <= "00101001000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-127x0.1 * 2^-46x1.0 = 2^-127x0.0..00
|
str_read(testcases_file,str_fpu_op);
|
-- seeeeeeeefffffffffffffffffffffff
|
fpu_op_i <= to_std_logic_vector(str_fpu_op);
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000010000000000000000000000";
|
|
opb_i <= "00101000100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-127x0.1 * 2^-47x1.0 = 2^-127x0.0..00
|
str_read(testcases_file,str_rmode);
|
-- seeeeeeeefffffffffffffffffffffff
|
rmode_i <= to_std_logic_vector(str_rmode);
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000010000000000000000000000";
|
|
opb_i <= "00101000000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-126x1.0 * 2^-1x1.0 = 2^-127x1.0
|
str_read(testcases_file,str_in);
|
-- seeeeeeeefffffffffffffffffffffff
|
slv_out <= strhex_to_slv(str_in);
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000100000000000000000000000";
|
|
opb_i <= "00111111000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-126x1.0 * 2^-2x1.0 = 2^-127x0.1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000100000000000000000000000";
|
|
opb_i <= "00111110100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-126x1.0 * 2^-46x1.0 = 2^-127x0.0..0
|
assert output_o = slv_out
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000100000000000000000000000";
|
|
opb_i <= "00101000100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
report "Error!!!"
|
severity failure;
|
severity failure;
|
|
str_read(testcases_file,str_in);
|
|
|
-- 2^-126x1.0 * 2^-47x1.0 = 2^-127x0.0..0 - shr 46
|
end loop;
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000100000000000000000000000";
|
|
opb_i <= "00101000000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-126x1.0 * 2^-48x1.0 = 2^-127x0.0..0 - shr 46
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000100000000000000000000000";
|
|
opb_i <= "00100111100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- e^128 x 1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000000";
|
|
opb_i <= "00111110100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- e^127 x 1
|
----------------------------------------------------------------------------------------------------------------------------------------------------
|
-- seeeeeeeefffffffffffffffffffffff
|
assert false
|
wait for CLK_PERIOD; start_i <= '1';
|
report "Success!!!.......Yahoooooooooooooo"
|
opa_i <= "00000001100000000000000000000000";
|
|
opb_i <= "00111110000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
-- and underflow_o=underflow_y
|
|
report "Error!!!"
|
|
severity failure;
|
severity failure;
|
|
|
-- e^126 x 1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000000";
|
|
opb_i <= "00111101100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000111111100000000000000000000";
|
|
opb_i <= "00000000100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000001111111111111111111111";
|
|
opb_i <= "00000000000000000000000000010000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "10000000011101111111111111111101";
|
|
opb_i <= "00111010000000000000000000000001";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-127x0.11 * 2^-0x1.0 = 2^-127x0.11
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000011000000000000000000000";
|
|
opb_i <= "00111111100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 2^-127x0.11 * 2^-1x1.0 = 2^-127x0.11
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000011000000000000000000000";
|
|
opb_i <= "00111111000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- 2^-127x0.11 * 2^-2x1.11
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000011000000000000000000000";
|
|
opb_i <= "00111110111000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- 2^-127x0.11 * 2^-0x1.11
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000011000000000000000000000";
|
|
opb_i <= "00111111111000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000011110000000000000000000";
|
|
opb_i <= "00111100111110000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "01111111100000000000000000000000";
|
|
opb_i <= "00000111000101111000001111100110";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000011111110100011111000101000";
|
|
opb_i <= "00000111000101111000001111100110";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1'; opa_i <= "00000000000000000000000000000000";
|
|
opb_i <= "00000111000101111000001111100110";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000011000000000000000000000";
|
|
opb_i <= "00111111111000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000110000000000000000000000";
|
|
opb_i <= "00111111000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- inf
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111110000000000000000000000";
|
|
opb_i <= "00000000000000000000000000000001";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- ******* check rounding ********---
|
|
|
|
--Round to nearst even
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000000000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000110000000000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001110000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000001000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000001000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000000000000000000000..1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000001";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000000000000000000000000000..1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000001";
|
|
opb_i <= "00011001000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- round up
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000000000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "10";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000110000000000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001110000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "10";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000001000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000001000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "10";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 0000000000000000000000000100000000000000000000001
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000001";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "10";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000000000000000000000000000..1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000001";
|
|
opb_i <= "00011001000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "10";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- round down
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000000000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "11";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000110000000000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001110000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "11";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000001000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000001000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "11";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 0000000000000000000000000100000000000000000000001
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000001";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "11";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000000000000000000000000000..1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000001";
|
|
opb_i <= "00011001000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "11";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- round to zero
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000000000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "01";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000110000000000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001110000000000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "01";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000010000001000000000000000
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000001000000000000000";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "01";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 0000000000000000000000000100000000000000000000001
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000001";
|
|
opb_i <= "00110010100000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "01";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- xx00000000000000000000000xxxxxxxxxxxxxxxxxxxxxxx
|
|
-- fract2a= 000000000000000000000000000000000000000000000000..1
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000001100000000000000000000001";
|
|
opb_i <= "00011001000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "01";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y and underflow_y=underflow_o
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- inf 2^100x1.0 * 2^128x1.0 =
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01110001100000000000000000000000";
|
|
opb_i <= "01001101100000000000000000000001";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- inf * 0
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111110000000000000000000000";
|
|
opb_i <= "00000000000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- Qnan * n
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111110000000000000000000001";
|
|
opb_i <= "00000010000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- Snan * n
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111100000000000000000000001";
|
|
opb_i <= "00000010000000000000000000000000";
|
|
fpu_op_i <= "010";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
--************* Division Test Vectors************************************************************
|
|
|
|
-- round to nearset even
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01000001101010000000000000000000"; --21
|
|
opb_i <= "01000000010000000000000000000000"; --3
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01000001111111111111111111111111";
|
|
opb_i <= "01000000000000000000000000000000";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00111111100000000000000000000000";
|
|
opb_i <= "01000000010000000000000000000000";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 0 / x
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000000000000000000000000000";
|
|
opb_i <= "01000000010000000000000000000000";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- x / 0
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01000000000000000000000000000000";
|
|
opb_i <= "00000000000000000000000000000000";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- overflow
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01000000000000000000000000000000";
|
|
opb_i <= "00000000010000000000000000000000";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000010100000000000000000000";
|
|
opb_i <= "00000100010000000000000000000000";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "10000000010100000000000000000000";
|
|
opb_i <= "00000000010000000000000000011000";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o=fpout_y and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- inf / inf
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111111111111111111111111111";
|
|
opb_i <= "01111111111111111111111111111111";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o(30 downto 0)=fpout_y(30 downto 0) and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- 0 / 0
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000000000000000000000000000";
|
|
opb_i <= "00000000000000000000000000000000";
|
|
fpu_op_i <= "011";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o(30 downto 0)=fpout_y(30 downto 0) and ine_o=ine_y and overflow_o=overflow_y and underflow_o=underflow_y and inf_o=inf_y and zero_y=zero_o and div_zero_o=div_by_zero_y and qnan_o=qnan_y and snan_o=snan_y
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
--************* Square-Root Test Vectors************************************************************
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01000001000100000000000000000000"; --9
|
|
opb_i <= "00000000000000000000000000000000";
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o= "01000000010000000000000000000000" and ine_o='0' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0'
|
|
and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01000001001000000000000000000000"; --10
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01000000010010100110001011000010" and ine_o='1' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0' and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01010001011011011000111001100111";
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01001000011101101001101100010011" and ine_o='1' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0' and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01000001100000000000000000000000"; --16
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01000000100000000000000000000000" and ine_o='0' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0' and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01000000110000000000000000000000"; --6
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01000000000111001100010001110001" and ine_o='1' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0' and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01001101110110010011101101001010"; --455567687
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01000110101001101100000000010000" and ine_o='1' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0' and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "11001101110110010011101101001010"; -- - 455567687
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="11111111110000000000000000000001" and ine_o='0' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='1' and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000000000000000000000000001"; --MIN
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="00011010001101010000010011110011" and ine_o='1' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0'
|
|
and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111011111111111111111111111"; --MAX
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01011111011111111111111111111111" and ine_o='1' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0'
|
|
and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "00000000000000000000000000000000"; -- +0
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="00000000000000000000000000000000" and ine_o='0' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0'
|
|
and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "10000000000000000000000000000000"; -- -0
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="10000000000000000000000000000000" and ine_o='0' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='0'
|
|
and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111100000000000000000000000"; -- inf
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01111111100000000000000000000000" and ine_o='0' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='1' and div_zero_o='0' and qnan_o='0'
|
|
and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111110000000000000000000001"; -- qnan
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01111111110000000000000000000001" and ine_o='0' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='1'
|
|
and snan_o='0'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
-- seeeeeeeefffffffffffffffffffffff
|
|
wait for CLK_PERIOD; start_i <= '1';
|
|
opa_i <= "01111111100000000000000000000001"; -- snan
|
|
fpu_op_i <= "100";
|
|
rmode_i <= "00";
|
|
wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1';
|
|
assert output_o="01111111110000000000000000000001" and ine_o='0' and
|
|
overflow_o='0' and underflow_o='0' and inf_o='0' and div_zero_o='0' and qnan_o='1' and snan_o='1'
|
|
report "Error!!!"
|
|
severity failure;
|
|
|
|
|
|
|
|
assert false
|
|
report "Success!!!"
|
|
severity failure;
|
|
|
|
|
|
|
|
|
|
wait;
|
wait;
|
|
|
end process verify;
|
end process verify;
|
|
|
end rtl;
|
end rtl;
|
No newline at end of file
|
No newline at end of file
|
