URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [positVerilog/] [isqrt2.v] - Diff between revs 40 and 42

Rev 40	Rev 42
Line 122...	Line 122...
`assign done = state==DONE && cnt > 8'd0;`	`assign done = state==DONE && cnt > 8'd0;`

`endmodule`	`endmodule`


`module isqrt_tb();`	`module isqrt2_tb();`

`reg clk;`	`reg clk;`
`reg rst;`	`reg rst;`
`reg [31:0] a;`	`reg [31:0] a;`
`wire [63:0] o;`	`wire [63:0] o;`
Line 163...	Line 163...
`$display("i=%h o=%h", a, o);`	`$display("i=%h o=%h", a, o);`
`end`	`end`
`endcase`	`endcase`
`end`	`end`

`isqrt #(32) u1 (.rst(rst), .clk(clk), .ce(1'b1), .ld(ld), .a(a), .o(o), .done(done));`	`isqrt2 #(32) u1 (.rst(rst), .clk(clk), .ce(1'b1), .ld(ld), .a(a), .o(o), .done(done));`

`endmodule`	`endmodule`



`No newline at end of file`	`No newline at end of file`