OpenCores
URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [positVerilog/] [positCntlz.sv] - Diff between revs 42 and 48

Show entire file | Details | Blame | View Log

Rev 42 Rev 48
Line 1... Line 1...
`include "positConfig.sv"
 
// ============================================================================
// ============================================================================
//        __
//        __
//   \\__/ o\    (C) 2020  Robert Finch, Waterloo
//   \\__/ o\    (C) 2020  Robert Finch, Waterloo
//    \  __ /    All rights reserved.
//    \  __ /    All rights reserved.
//     \/_//     robfinch@finitron.ca
//     \/_//     robfinch@finitron.ca
Line 21... Line 20...
// You should have received a copy of the GNU General Public License
// You should have received a copy of the GNU General Public License
// along with this program.  If not, see .
// along with this program.  If not, see .
//
//
// ============================================================================
// ============================================================================
//
//
 
import posit::PSTWID;
 
 
module positCntlz(i, o);
module positCntlz(i, o);
parameter PSTWID = `PSTWID;
parameter PSTWID = `PSTWID;
input [PSTWID-2:0] i;
input [PSTWID-2:0] i;
output [$clog2(PSTWID-1)-1:0] o;
output [$clog2(PSTWID-1)-1:0] o;
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.