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Line 24... |
// You should have received a copy of the GNU General Public License
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see .
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// along with this program. If not, see .
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//
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//
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// ============================================================================
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// ============================================================================
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`include "positConfig.sv"
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import posit::*;
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module positFDP(op, a, b, c, d, o, zero, inf);
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module positFDP(op, a, b, c, d, o, zero, inf);
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`include "positSize.sv"
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input op;
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input op;
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input [PSTWID-1:0] a;
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input [PSTWID-1:0] a;
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input [PSTWID-1:0] b;
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input [PSTWID-1:0] b;
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input [PSTWID-1:0] c;
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input [PSTWID-1:0] c;
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input [PSTWID-1:0] d;
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input [PSTWID-1:0] d;
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Line 39... |
output inf;
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output inf;
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wire [PSTWID+es+(PSTWID-es)*2-1:0] o1;
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wire [PSTWID+es+(PSTWID-es)*2-1:0] o1;
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wire [PSTWID+es+(PSTWID-es)*2-1:0] o2;
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wire [PSTWID+es+(PSTWID-es)*2-1:0] o2;
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positFDPMul #(.PSTWID(PSTWID), .es(es)) u1 (a, b, o1, zero1, inf1);
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positFDPMul u1 (a, b, o1, zero1, inf1);
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positFDPMul #(.PSTWID(PSTWID), .es(es)) u2 (c, d, o2, zero2, inf2);
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positFDPMul u2 (c, d, o2, zero2, inf2);
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positFDPAddsub #(.PSTWID(PSTWID), .es(es)) u3 (op, o1, o2, o, zero, inf);
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positFDPAddsub u3 (op, o1, o2, o, zero, inf);
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endmodule
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endmodule
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