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[/] [ft816float/] [trunk/] [rtl/] [verilog/] [fpMul.v] - Diff between revs 11 and 26

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Line 48... Line 48...
//      48 mantissa
//      48 mantissa
//
//
// ============================================================================
// ============================================================================
 
 
module fpMul (clk, ce, a, b, o, sign_exe, inf, overflow, underflow);
module fpMul (clk, ce, a, b, o, sign_exe, inf, overflow, underflow);
parameter WID = 128;
parameter WID = 32;
localparam MSB = WID-1;
`include "fpSize.sv"
localparam EMSB = WID==128 ? 14 :
 
                  WID==96 ? 14 :
 
                  WID==80 ? 14 :
 
                  WID==64 ? 10 :
 
                                  WID==52 ? 10 :
 
                                  WID==48 ? 11 :
 
                                  WID==44 ? 10 :
 
                                  WID==42 ? 10 :
 
                                  WID==40 ?  9 :
 
                                  WID==32 ?  7 :
 
                                  WID==24 ?  6 : 4;
 
localparam FMSB = WID==128 ? 111 :
 
                  WID==96 ? 79 :
 
                  WID==80 ? 63 :
 
                  WID==64 ? 51 :
 
                                  WID==52 ? 39 :
 
                                  WID==48 ? 34 :
 
                                  WID==44 ? 31 :
 
                                  WID==42 ? 29 :
 
                                  WID==40 ? 28 :
 
                                  WID==32 ? 22 :
 
                                  WID==24 ? 15 : 9;
 
 
 
localparam FX = (FMSB+2)*2-1;   // the MSB of the expanded fraction
 
localparam EX = FX + 1 + EMSB + 1 + 1 - 1;
 
 
 
input clk;
input clk;
input ce;
input ce;
input  [WID:1] a, b;
input  [WID:1] a, b;
output [EX:0] o;
output [EX:0] o;
Line 130... Line 105...
// adjust the sum by the exponent offset (subtract 127)
// adjust the sum by the exponent offset (subtract 127)
// mul: ex1 = xa + xb,  result should always be < 1ffh
// mul: ex1 = xa + xb,  result should always be < 1ffh
assign ex1 = (az|bz) ? 0 : (xa|a_dn) + (xb|b_dn) - bias;
assign ex1 = (az|bz) ? 0 : (xa|a_dn) + (xb|b_dn) - bias;
 
 
generate
generate
if (WID==64) begin
if (WID==80) begin
 
reg [31:0] p00,p01,p02,p03;
 
reg [31:0] p10,p11,p12,p13;
 
reg [31:0] p20,p21,p22,p23;
 
reg [31:0] p30,p31,p32,p33;
 
        always @(posedge clk)
 
        if (ce) begin
 
                p00 <= fracta[15: 0] * fractb[15: 0];
 
                p01 <= fracta[31:16] * fractb[15: 0];
 
                p02 <= fracta[47:32] * fractb[15: 0];
 
                p03 <= fracta[63:48] * fractb[15: 0];
 
 
 
                p10 <= fracta[15: 0] * fractb[31:16];
 
                p11 <= fracta[31:16] * fractb[31:16];
 
                p12 <= fracta[47:32] * fractb[31:16];
 
                p13 <= fracta[63:48] * fractb[31:16];
 
 
 
                p20 <= fracta[15: 0] * fractb[47:32];
 
                p21 <= fracta[31:16] * fractb[47:32];
 
                p22 <= fracta[47:32] * fractb[47:32];
 
                p23 <= fracta[63:48] * fractb[47:32];
 
 
 
                p30 <= fracta[15: 0] * fractb[63:48];
 
                p31 <= fracta[31:16] * fractb[63:48];
 
                p32 <= fracta[47:32] * fractb[63:48];
 
                p33 <= fracta[63:48] * fractb[63:48];
 
 
 
                fract1 <=                                               {p03,48'b0} + {p02,32'b0} + {p01,16'b0} + p00 +
 
                                                                  {p13,64'b0} + {p12,48'b0} + {p11,32'b0} + {p10,16'b0} +
 
                                        {p23,80'b0} + {p22,64'b0} + {p21,48'b0} + {p20,32'b0} +
 
      {p33,96'b0} + {p32,80'b0} + {p31,64'b0} + {p30,48'b0}
 
                                ;
 
        end
 
end
 
else if (WID==64) begin
reg [35:0] p00,p01,p02;
reg [35:0] p00,p01,p02;
reg [35:0] p10,p11,p12;
reg [35:0] p10,p11,p12;
reg [35:0] p20,p21,p22;
reg [35:0] p20,p21,p22;
        always @(posedge clk)
        always @(posedge clk)
        if (ce) begin
        if (ce) begin
Line 165... Line 174...
                p11 <= fracta[23:12] * fractb[23:12];
                p11 <= fracta[23:12] * fractb[23:12];
                fract1 <= {p11,p00} + {p01,12'b0} + {p10,12'b0};
                fract1 <= {p11,p00} + {p01,12'b0} + {p10,12'b0};
        end
        end
end
end
else begin
else begin
reg [35:0] p00,p01,p02;
 
reg [35:0] p10,p11,p12;
 
reg [35:0] p20,p21,p22;
 
        always @(posedge clk)
        always @(posedge clk)
    if (ce) begin
    if (ce) begin
        fract1a <= fracta * fractb;
        fract1a <= fracta * fractb;
        fract1 <= fract1a;
        fract1 <= fract1a;
    end
    end
Line 236... Line 242...
 
 
assign o = {so1,xo1,mo1};
assign o = {so1,xo1,mo1};
 
 
endmodule
endmodule
 
 
 
 
 
// Multiplier with normalization and rounding.
 
 
module fpMulnr(clk, ce, a, b, o, rm, sign_exe, inf, overflow, underflow);
module fpMulnr(clk, ce, a, b, o, rm, sign_exe, inf, overflow, underflow);
parameter WID=32;
parameter WID=32;
localparam MSB = WID-1;
`include "fpSize.sv"
localparam EMSB = WID==128 ? 14 :
 
                  WID==96 ? 14 :
 
                  WID==80 ? 14 :
 
                  WID==64 ? 10 :
 
                                  WID==52 ? 10 :
 
                                  WID==48 ? 11 :
 
                                  WID==44 ? 10 :
 
                                  WID==42 ? 10 :
 
                                  WID==40 ?  9 :
 
                                  WID==32 ?  7 :
 
                                  WID==24 ?  6 : 4;
 
localparam FMSB = WID==128 ? 111 :
 
                  WID==96 ? 79 :
 
                  WID==80 ? 63 :
 
                  WID==64 ? 51 :
 
                                  WID==52 ? 39 :
 
                                  WID==48 ? 34 :
 
                                  WID==44 ? 31 :
 
                                  WID==42 ? 29 :
 
                                  WID==40 ? 28 :
 
                                  WID==32 ? 22 :
 
                                  WID==24 ? 15 : 9;
 
 
 
localparam FX = (FMSB+2)*2-1;   // the MSB of the expanded fraction
 
localparam EX = FX + 1 + EMSB + 1 + 1 - 1;
 
input clk;
input clk;
input ce;
input ce;
input  [MSB:0] a, b;
input  [MSB:0] a, b;
output [MSB:0] o;
output [MSB:0] o;
input [2:0] rm;
input [2:0] rm;
Line 287... Line 272...
delay2      #(1)   u5(.clk(clk), .ce(ce), .i(inf1), .o(inf));
delay2      #(1)   u5(.clk(clk), .ce(ce), .i(inf1), .o(inf));
delay2      #(1)   u6(.clk(clk), .ce(ce), .i(overflow1), .o(overflow));
delay2      #(1)   u6(.clk(clk), .ce(ce), .i(overflow1), .o(overflow));
delay2      #(1)   u7(.clk(clk), .ce(ce), .i(underflow1), .o(underflow));
delay2      #(1)   u7(.clk(clk), .ce(ce), .i(underflow1), .o(underflow));
endmodule
endmodule
 
 
module fpMul_tb();
 
reg clk;
 
 
 
initial begin
 
        clk = 0;
 
end
 
always #10 clk <= ~clk;
 
 
 
fpMul u1 (.clk(clk), .ce(1'b1), .a(0), .b(0), .o(o1), .sign_exe(sgnx1), .inf(inf1), .overflow(of1), .underflow(uf1));
 
fpMul u2 (.clk(clk), .ce(1'b1), .a(0), .b(0), .o(o1), .sign_exe(sgnx1), .inf(inf1), .overflow(of1), .underflow(uf1));
 
 
 
endmodule
 
 
 
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