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`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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// ============================================================================
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// ============================================================================
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// __
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// __
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// \\__/ o\ (C) 2007-2016 Robert Finch, Waterloo
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// \\__/ o\ (C) 2007-2019 Robert Finch, Waterloo
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// \ __ / All rights reserved.
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// \ __ / All rights reserved.
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// \/_// robfinch<remove>@finitron.ca
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// \/_// robfinch<remove>@finitron.ca
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// ||
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// ||
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//
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//
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// fpZLUnit.v
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// fpZLUnit.v
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// fman - get mantissa (set exponent to zero)
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// fman - get mantissa (set exponent to zero)
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// fcmp
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// fcmp
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//
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//
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// ============================================================================
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// ============================================================================
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`define FLOAT 6'h36
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`define FLOAT 4'h1
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`define FMOV 6'h00
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`define FLT1 4'h1
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`define FNEG 6'h04
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`define FLT2 4'h2
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`define FABS 6'h05
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`define FLT3 4'h3
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`define FSIGN 6'h06
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`define FANDI 4'hE
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`define FMAN 6'h07
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`define FORI 4'hF
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`define FNABS 6'h08
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`define FCVTSQ 6'h0B
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`define FMAX 5'h10
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`define FMIN 5'h11
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`define FCMP 5'h06
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`define FMOV 5'h00
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`define FNEG 5'h04
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`define FABS 5'h05
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`define FSIGN 5'h06
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`define FMAN 5'h07
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`define FNABS 5'h08
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`define FCVTSD 5'h09
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`define F32TO80 5'h0A
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`define ISNAN 5'h0E
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`define CPYSGN 5'h0F // FLT2
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`define FINITE 5'h0F // FLT1
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//`define FCVTSQ 6'h1B
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`define FCVTDS 5'h19
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`define FSLT 5'h10
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`define FSGE 5'h11
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`define FSLE 5'h12
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`define FSGT 5'h13
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`define FSEQ 5'h14
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`define FSNE 5'h15
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`define FSUN 5'h16
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`define F80TO32 5'h1A
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`define UNORD 5'h1F
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module fpZLUnit
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module fpZLUnit
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#(parameter WID=32)
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#(parameter WID=80)
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(
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(
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input [31:0] ir,
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input [3:0] op4,
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input [WID-1:0] a,
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input [4:0] func5,
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input [WID-1:0] b, // for fcmp
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input [39:0] ir,
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output reg [WID-1:0] o,
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input [WID+3:0] a,
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output nanx
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input [WID+3:0] b, // for fcmp
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input [WID+3:0] c, // for fcmp
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output reg [WID+3:0] o,
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output reg nanx
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);
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);
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localparam MSB = WID-1;
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`include "fpSize.sv"
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localparam EMSB = WID==128 ? 14 :
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WID==96 ? 14 :
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WID==80 ? 14 :
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WID==64 ? 10 :
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WID==52 ? 10 :
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WID==48 ? 10 :
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WID==44 ? 10 :
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WID==42 ? 10 :
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WID==40 ? 9 :
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WID==32 ? 7 :
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WID==24 ? 6 : 4;
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localparam FMSB = WID==128 ? 111 :
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WID==96 ? 79 :
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WID==80 ? 63 :
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WID==64 ? 51 :
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WID==52 ? 39 :
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WID==48 ? 35 :
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WID==44 ? 31 :
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WID==42 ? 29 :
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WID==40 ? 28 :
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WID==32 ? 22 :
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WID==24 ? 15 : 9;
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wire [5:0] op = ir[5:0];
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wire [1:0] prec = ir[28:27];
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wire [5:0] fn = ir[17:12];
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wire [2:0] fn3 = ir[31:29];
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wire [3:0] cmp_o;
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//wire [1:0] prec = ir[25:24];
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fp_cmp_unit #(WID) u1 (.a(a), .b(b), .o(cmp_o), .nanx(nanx) );
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wire nanxab,nanxac,nanxbc;
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wire nana;
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wire [EMSB:0] expa;
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wire [FMSB:0] ma;
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wire xinfa;
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wire [4:0] cmp_o, cmpac_o, cmpbc_o;
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// Zero is being passed for b in some cases so the NaN must come from a if
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// present.
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fp_cmp_unit #(WID+4) u1 (.a(a), .b(b), .o(cmp_o), .nanx(nanxab) );
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fp_cmp_unit #(WID+4) u2 (.a(a), .b(c), .o(cmpac_o), .nanx(nanxac) );
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fp_cmp_unit #(WID+4) u3 (.a(b), .b(c), .o(cmpbc_o), .nanx(nanxbc) );
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fpDecomp #(WID+4) u4 (.i(a), .sgn(), .exp(expa), .man(ma), .fract(), .xz(), .mz(), .vz(), .inf(), .xinf(xinfa), .qnan(), .snan(), .nan(nana));
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wire [127:0] sq_o;
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wire [127:0] sq_o;
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fcvtsq u2 (a, sq_o);
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//fcvtsq u2 (a[31:0], sq_o);
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wire [79:0] sdo;
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fs2d u5 (a[43:4], sdo);
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wire [39:0] dso;
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fd2s u6 (a, dso);
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wire [79:0] f32to80o;
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wire [31:0] f80to32o;
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F32ToF80 u7 (a[35:4], f32to80o);
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F80ToF32 u8 (a[WID+3:4], f32to80o);
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always @*
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always @*
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case(op)
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case(op4)
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`FLOAT:
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`FLT1:
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case(fn3)
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case(func5)
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3'b000:
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`FABS: begin o <= {1'b0,a[WID-2:0]}; nanx <= nanxab; end
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case(fn)
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`FNABS: begin o <= {1'b1,a[WID-2:0]}; nanx <= nanxab; end
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`FABS: o <= {1'b0,a[WID-2:0]}; // fabs
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`FNEG: begin o <= {~a[WID-1],a[WID-2:0]}; nanx <= nanxab; end
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`FNABS: o <= {1'b1,a[WID-2:0]}; // fnabs
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`FMOV: begin o <= a; nanx <= nanxab; end
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`FNEG: o <= {~a[WID-1],a[WID-2:0]}; // fneg
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`FSIGN: begin o <= (a[WID-2:0]==0) ? 0 : {a[WID-1],1'b0,{EMSB{1'b1}},{FMSB+1{1'b0}}}; nanx <= 1'b0; end
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`FMOV: o <= a; // fmov
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`FMAN: begin o <= {a[WID-1],1'b0,{EMSB{1'b1}},a[FMSB:0]}; nanx <= 1'b0; end
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`FSIGN: o <= (a[WID-2:0]==0) ? 0 : {a[WID-1],1'b0,{EMSB{1'b1}},{FMSB+1{1'b0}}}; // fsign
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//`FCVTSQ: o <= sq_o;
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`FMAN: o <= {a[WID-1],1'b0,{EMSB{1'b1}},a[FMSB:0]}; // fman
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`FCVTSD: begin o <= {sdo,4'h0}; nanx <= nanxab; end
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`FCVTSQ: o <= sq_o;
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`FCVTDS: begin o <= {{40{dso[39]}},dso,4'h0}; nanx <= nanxab; end
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`F32TO80: begin o <= {f32to80o,4'h0}; nanx <= nanxab; end
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`F80TO32: begin o <= {f80to32o,4'h0}; nanx <= nanxab; end
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`ISNAN: begin o <= nana; end
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`FINITE: begin o <= !xinfa; end
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`UNORD: begin o <= nanxab; end
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default: o <= 0;
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default: o <= 0;
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endcase
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endcase
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// FCMP
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`FLT2:
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3'b001: o <= cmp_o;
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case(func5)
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`FCMP: begin o <= {cmp_o,4'h0}; nanx <= nanxab; end
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`FSLT: begin o <= {cmp_o[1],4'h0}; nanx <= nanxab; end
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`FSGE: begin o <= {~cmp_o[1],4'h0}; nanx <= nanxab; end
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`FSLE: begin o <= {cmp_o[2],4'h0}; nanx <= nanxab; end
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`FSGT: begin o <= ~{cmp_o[2],4'h0}; nanx <= nanxab; end
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`FSEQ: begin o <= {cmp_o[0],4'h0}; nanx <= nanxab; end
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`FSNE: begin o <= ~{cmp_o[0],4'h0}; nanx <= nanxab; end
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`FSUN: begin o <= {cmp_o[4],4'h0}; nanx <= nanxab; end
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`CPYSGN: begin o <= {b[WID+3],a[WID+2:0]}; end
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default: o <= 0;
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endcase
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`FLT3:
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case(func5)
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`FMAX:
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begin
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o <= ~cmp_o[2] & ~cmpac_o[2] ? a : ~cmpbc_o[2] ? b : c;
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nanx <= nanxab|nanxac|nanxbc;
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end
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`FMIN:
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begin
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o <= cmp_o[1] & cmpac_o[1] ? a : cmpbc_o[2] ? b : c;
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nanx <= nanxab|nanxac|nanxbc;
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end
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default: o <= 0;
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endcase
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`FANDI:
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begin
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case(ir[32:31])
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2'd0: o <= {a[23: 4] & {{58{1'b1}},ir[39:33],ir[30:16],4'h0}};
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2'd1: o <= a[43:24] & {{36{1'b1}},ir[39:33],ir[30:16],{20{1'b1}}};
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2'd2: o <= a[63:44] & {{14{1'b1}},ir[39:33],ir[30:16],{40{1'b1}}};
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2'd3: o <= a[83:64] & {ir[39:33],ir[30:16],{60{1'b1}}};
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endcase
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nanx <= 1'b0;
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end
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`FORI:
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begin
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case(ir[32:31])
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2'd0: o <= {a[23: 4] & {{58{1'b0}},ir[39:33],ir[30:16],4'h0}};
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2'd1: o <= a[43:24] & {{36{1'b0}},ir[39:33],ir[30:16],{20{1'b0}}};
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2'd2: o <= a[63:44] & {{14{1'b0}},ir[39:33],ir[30:16],{40{1'b0}}};
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2'd3: o <= a[83:64] & {ir[39:33],ir[30:16],{60{1'b0}}};
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endcase
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endcase
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nanx <= 1'b0;
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end
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default: o <= 0;
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default: o <= 0;
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endcase
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endcase
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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