URL
https://opencores.org/ocsvn/ft816float/ft816float/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 57 |
Rev 58 |
Line 354... |
Line 354... |
delay #(.WID(1), .DEP(3)) udly11e (.clk(clk), .ce(ce), .i(op8), .o(op11));
|
delay #(.WID(1), .DEP(3)) udly11e (.clk(clk), .ce(ce), .i(op8), .o(op11));
|
delay #(.WID(N*4), .DEP(3)) udly11f (.clk(clk), .ce(ce), .i(siga8), .o(siga11));
|
delay #(.WID(N*4), .DEP(3)) udly11f (.clk(clk), .ce(ce), .i(siga8), .o(siga11));
|
delay #(.WID(N*4), .DEP(3)) udly11g (.clk(clk), .ce(ce), .i(sigb8), .o(sigb11));
|
delay #(.WID(N*4), .DEP(3)) udly11g (.clk(clk), .ce(ce), .i(sigb8), .o(sigb11));
|
|
|
always @(posedge clk)
|
always @(posedge clk)
|
if (ce) xoinf11 <= xo10==14'h3FFF;
|
if (ce) xoinf11 <= xo10==14'h2FFF;
|
|
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
// Clock #12
|
// Clock #12
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
reg [(N+1)*4*2-1:0] mo12; // mantissa output
|
reg [(N+1)*4*2-1:0] mo12; // mantissa output
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.