OpenCores
URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [DFPAddsub128.sv] - Diff between revs 64 and 70

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 64 Rev 70
Line 117... Line 117... 
reg [15:0] xa2, xb2;
 
reg [15:0] xa2, xb2;
 
reg az2, bz2;
 
reg az2, bz2;
 
reg xa_gt_xb2;
 
reg xa_gt_xb2;
 
reg [N*4-1:0] siga2, sigb2;
 
reg [N*4-1:0] siga2, sigb2;
 
reg sigeq, siga_gt_sigb;
 
reg sigeq, siga_gt_sigb;
 
reg xa_gt_xb2;
 
 
 
reg expeq;
 
reg expeq;
 
reg sxo2;
 
reg sxo2;
 
 
 
 
 
always_ff @(posedge clk)
 
always_ff @(posedge clk)
 
  if (ce) realOp2 = op1 ^ au.sign ^ bu.sign;
 
  if (ce) realOp2 = op1 ^ au.sign ^ bu.sign;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.