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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [DFPPkg.sv] - Diff between revs 57 and 75

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// ============================================================================
// ============================================================================
//        __
//        __
//   \\__/ o\    (C) 2020-2021  Robert Finch, Waterloo
//   \\__/ o\    (C) 2020-2022  Robert Finch, Waterloo
//    \  __ /    All rights reserved.
//    \  __ /    All rights reserved.
//     \/_//     robfinch@finitron.ca
//     \/_//     robfinch@finitron.ca
//       ||
//       ||
//
//
//      DFPPkg.sv
//      DFPPkg.sv
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package DFPPkg;
package DFPPkg;
 
 
`define SUPPORT_DENORMALS       1'b1
`define SUPPORT_DENORMALS       1'b1
 
 
 
`define QINFDIV         4'd2
 
`define QZEROZERO       4'd3
 
 
typedef struct packed
typedef struct packed
{
{
        logic sign;
        logic sign;
        logic [4:0] combo;
        logic [4:0] combo;
        logic [14:0] expc;      // exponent continuation field
        logic [14:0] expc;      // exponent continuation field
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        logic [4:0] combo;
        logic [4:0] combo;
        logic [11:0] expc;      // exponent continuation field
        logic [11:0] expc;      // exponent continuation field
        logic [109:0] sigc;     // significand continuation field
        logic [109:0] sigc;     // significand continuation field
} DFP128;
} DFP128;
 
 
 
// Packed 128 bit (storage) format
 
typedef struct packed
 
{
 
        logic sign;
 
        logic [4:0] combo;
 
        logic [9:0] expc;       // exponent continuation field
 
        logic [79:0] sigc;      // significand continuation field
 
} DFP96;
 
 
 
typedef logic [11:0] DFP96EXP;
 
typedef logic [99:0] DFP96SIG;
 
 
typedef logic [13:0] DFP128EXP;
typedef logic [13:0] DFP128EXP;
typedef logic [135:0] DFP128SIG;
typedef logic [135:0] DFP128SIG;
 
 
 
// Unpacked 96 bit format
 
typedef struct packed
 
{
 
        logic nan;
 
        logic qnan;
 
        logic snan;
 
        logic infinity;
 
        logic sign;
 
        logic [11:0] exp;
 
        logic [99:0] sig;       // significand 25 digits
 
} DFP96U;
 
 
// Unpacked 128 bit format
// Unpacked 128 bit format
typedef struct packed
typedef struct packed
{
{
        logic nan;
        logic nan;
        logic qnan;
        logic qnan;
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        logic nan;
        logic nan;
        logic qnan;
        logic qnan;
        logic snan;
        logic snan;
        logic infinity;
        logic infinity;
        logic sign;
        logic sign;
 
        logic [11:0] exp;
 
        logic [103:0] sig;      // significand 26 digits
 
} DFP96UN;
 
 
 
// Normalizer output to rounding, one extra digit
 
typedef struct packed
 
{
 
        logic nan;
 
        logic qnan;
 
        logic snan;
 
        logic infinity;
 
        logic sign;
        logic [13:0] exp;
        logic [13:0] exp;
        logic [139:0] sig;      // significand 35 digits
        logic [139:0] sig;      // significand 35 digits
} DFP128UN;
} DFP128UN;
 
 
 
// 96-bit Double width significand, normalizer input
 
typedef struct packed
 
{
 
        logic nan;
 
        logic qnan;
 
        logic snan;
 
        logic infinity;
 
        logic sign;
 
        logic [11:0] exp;
 
        logic [207:0] sig;      // significand 50+ 1 lead, 1-trail digit
 
} DFP96UD;
 
 
// 128-bit Double width significand, normalizer input
// 128-bit Double width significand, normalizer input
typedef struct packed
typedef struct packed
{
{
        logic nan;
        logic nan;
        logic qnan;
        logic qnan;

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