URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [df128Toi.sv] - Diff between revs 60 and 62

Rev 60	Rev 62
Line 66...	Line 66...
`if (ce) sgn = ui.sign;`	`if (ce) sgn = ui.sign;`
`wire [13:0] exp = ui.exp; // exponent`	`wire [13:0] exp = ui.exp; // exponent`

`wire iz = i[126:0]==0; // zero value (special)`	`wire iz = i[126:0]==0; // zero value (special)`

`assign overflow = (exp - zeroXp) > 32; // lots of numbers are too big - don't forget one less bit is available due to signed values`	`wire [14:0] ovx = exp - zeroXp;`
	`assign overflow = ovx > 32 && !ovx[14]; // lots of numbers are too big - don't forget one less bit is available due to signed values`
`wire underflow = exp < zeroXp - 2'd1; // value less than 1/2`	`wire underflow = exp < zeroXp - 2'd1; // value less than 1/2`

`wire [7:0] shamt = 8'd172 - {(exp - zeroXp),2'd0}; // exp - zeroXp will be <= MSB`	`wire [7:0] shamt = 8'd172 - {(exp - zeroXp),2'd0}; // exp - zeroXp will be <= MSB`

`wire [176:0] o1 = {ui.sig,41'b0} >> shamt; // keep an extra bit for rounding`	`wire [176:0] o1 = {ui.sig,41'b0} >> shamt; // keep an extra bit for rounding`