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// ============================================================================
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// ============================================================================
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// __
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// __
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// \\__/ o\ (C) 2019-2020 Robert Finch, Waterloo
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// \\__/ o\ (C) 2019-2021 Robert Finch, Waterloo
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// \ __ / All rights reserved.
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// \ __ / All rights reserved.
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// \/_// robfinch@finitron.ca
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// \/_// robfinch@finitron.ca
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// ||
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// ||
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//
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//
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// fpFMA.sv
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// fpFMA.sv
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// - can issue every clock cycle
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// - can issue every clock cycle
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// - parameterized FPWIDth
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// - parameterized FPWIDth
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// - IEEE 754 representation
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// - IEEE 754 representation
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//
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//
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//
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//
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// This source file is free software: you can redistribute it and/or modify
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// BSD 3-Clause License
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// it under the terms of the GNU Lesser General Public License as published
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// Redistribution and use in source and binary forms, with or without
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// by the Free Software Foundation, either version 3 of the License, or
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// modification, are permitted provided that the following conditions are met:
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// (at your option) any later version.
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//
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//
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// This source file is distributed in the hope that it will be useful,
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// 1. Redistributions of source code must retain the above copyright notice, this
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// list of conditions and the following disclaimer.
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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//
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// You should have received a copy of the GNU General Public License
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// 2. Redistributions in binary form must reproduce the above copyright notice,
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// along with this program. If not, see .
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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//
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// ============================================================================
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// ============================================================================
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import fp::*;
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import fp::*;
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wire sticky, sticky12;
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wire sticky, sticky12;
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wire [FX:0] mfs12;
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wire [FX:0] mfs12;
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wire [7:0] xdif12;
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wire [7:0] xdif12;
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redorN #(.BSIZE(FX+1)) uredor1 (.a({1'b0,xdif11+FMSB}), .b(mfs), .o(sticky));
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/*
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generate
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generate
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begin
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begin
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if (FPWID==128)
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if (FPWID==128)
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redor128 u121 (.a(xdif11), .b({mfs,2'b0}), .o(sticky) );
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redor128 u121 (.a(xdif11), .b({mfs,2'b0}), .o(sticky) );
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else if (FPWID==96)
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else if (FPWID==96)
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$finish;
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$finish;
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end
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end
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end
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end
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end
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end
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endgenerate
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endgenerate
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*/
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// register inputs to shifter and shift
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// register inputs to shifter and shift
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delay1 #(1) u122(.clk(clk), .ce(ce), .i(sticky), .o(sticky12) );
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delay1 #(1) u122(.clk(clk), .ce(ce), .i(sticky), .o(sticky12) );
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delay1 #(8) u123(.clk(clk), .ce(ce), .i(xdif11), .o(xdif12) );
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delay1 #(8) u123(.clk(clk), .ce(ce), .i(xdif11), .o(xdif12) );
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delay2 #(FX+1) u124(.clk(clk), .ce(ce), .i(mfs), .o(mfs12) );
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delay2 #(FX+1) u124(.clk(clk), .ce(ce), .i(mfs), .o(mfs12) );
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