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Line 35... |
use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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--use work.hibiv3_pkg.all; -- hibi v3 commands
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--use work.hibiv3_pkg.all; -- hibi v3 commands
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entity hibi_orbus_small is
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entity hibi_orbus_6p is
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generic (
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generic (
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data_width_g : integer := 32;
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data_width_g : integer := 32;
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comm_width_g : integer := 5
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comm_width_g : integer := 5
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);
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);
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Line 70... |
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bus_av_3_in : in std_logic;
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bus_av_3_in : in std_logic;
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bus_data_3_in : in std_logic_vector(data_width_g-1 downto 0);
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bus_data_3_in : in std_logic_vector(data_width_g-1 downto 0);
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bus_comm_3_in : in std_logic_vector (comm_width_g-1 downto 0);
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bus_comm_3_in : in std_logic_vector (comm_width_g-1 downto 0);
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bus_lock_3_in : in std_logic;
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bus_lock_3_in : in std_logic;
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bus_full_3_in : in std_logic
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bus_full_3_in : in std_logic;
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bus_av_4_in : in std_logic;
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bus_av_4_in : in std_logic;
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bus_data_4_in : in std_logic_vector(data_width_g-1 downto 0);
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bus_data_4_in : in std_logic_vector(data_width_g-1 downto 0);
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bus_comm_4_in : in std_logic_vector (comm_width_g-1 downto 0);
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bus_comm_4_in : in std_logic_vector (comm_width_g-1 downto 0);
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bus_lock_4_in : in std_logic;
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bus_lock_4_in : in std_logic;
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bus_full_4_in : in std_logic
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bus_full_4_in : in std_logic;
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bus_av_5_in : in std_logic;
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bus_av_5_in : in std_logic;
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bus_data_5_in : in std_logic_vector(data_width_g-1 downto 0);
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bus_data_5_in : in std_logic_vector(data_width_g-1 downto 0);
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bus_comm_5_in : in std_logic_vector (comm_width_g-1 downto 0);
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bus_comm_5_in : in std_logic_vector (comm_width_g-1 downto 0);
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bus_lock_5_in : in std_logic;
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bus_lock_5_in : in std_logic;
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bus_full_5_in : in std_logic
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bus_full_5_in : in std_logic
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);
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);
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end hibi_orbus_small;
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end hibi_orbus_6p;
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architecture structural of hibi_orbus_small is
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architecture structural of hibi_orbus_6p is
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begin -- structural
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begin -- structural
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-- continuous assignments
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-- continuous assignments
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