| Line 1... |
Line 1... |
-- ***************************************************
|
-- ***************************************************
|
-- File: hibi_segment_6p.vhd
|
-- File: hibi_segment_6p.vhd
|
-- Creation date: 12.02.2013
|
-- Creation date: 28.02.2013
|
-- Creation time: 10:29:59
|
-- Creation time: 13:35:47
|
-- Description:
|
-- Description:
|
-- Created by: matilail
|
-- Created by: matilail
|
-- This file was generated with Kactus2 vhdl generator.
|
-- This file was generated with Kactus2 vhdl generator.
|
-- ***************************************************
|
-- ***************************************************
|
library IEEE;
|
library IEEE;
|
| Line 21... |
Line 21... |
ip_mslave_1_addr_end : integer := 4; -- HIBI end address for interface 1
|
ip_mslave_1_addr_end : integer := 4; -- HIBI end address for interface 1
|
ip_mslave_1_addr_start : integer := 3; -- HIBI address for interface 1
|
ip_mslave_1_addr_start : integer := 3; -- HIBI address for interface 1
|
ip_mslave_2_addr_end : integer := 6; -- HIBI end address for interface 2
|
ip_mslave_2_addr_end : integer := 6; -- HIBI end address for interface 2
|
ip_mslave_2_addr_start : integer := 5; -- HIBI address for interface 2
|
ip_mslave_2_addr_start : integer := 5; -- HIBI address for interface 2
|
ip_mslave_3_addr_end : integer := 8; -- HIBI end address for interface 3
|
ip_mslave_3_addr_end : integer := 8; -- HIBI end address for interface 3
|
ip_mslave_3_addr_start : integer := 7 -- HIBI address for interface 3
|
ip_mslave_3_addr_start : integer := 7; -- HIBI address for interface 3
|
|
ip_mslave_4_addr_end : integer := 10; -- HIBI end address for interface 3
|
|
ip_mslave_4_addr_start : integer := 9; -- HIBI address for interface 3
|
|
ip_mslave_5_addr_end : integer := 12; -- HIBI end address for interface 3
|
|
ip_mslave_5_addr_start : integer := 11 -- HIBI address for interface 3
|
);
|
);
|
|
|
port (
|
port (
|
|
|
-- Interface: clocks_0
|
-- Interface: clocks_0
|
| Line 184... |
Line 188... |
|
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveAV : std_logic;
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveAV : std_logic;
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveAV : std_logic;
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveAV : std_logic;
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveAV : std_logic;
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveAV : std_logic;
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV : std_logic;
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV : std_logic;
|
|
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV : std_logic;
|
|
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV : std_logic;
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV : std_logic;
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV : std_logic;
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
|
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
|
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM : std_logic_vector(4 downto 0);
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
|
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
|
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA : std_logic_vector(31 downto 0);
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL : std_logic;
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL : std_logic;
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL : std_logic;
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL : std_logic;
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL : std_logic;
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL : std_logic;
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL : std_logic;
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL : std_logic;
|
|
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL : std_logic;
|
|
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL : std_logic;
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL : std_logic;
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL : std_logic;
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK : std_logic;
|
signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK : std_logic;
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK : std_logic;
|
signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK : std_logic;
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK : std_logic;
|
signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK : std_logic;
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK : std_logic;
|
signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK : std_logic;
|
|
signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK : std_logic;
|
|
signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK : std_logic;
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK : std_logic;
|
signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK : std_logic;
|
|
|
component hibi_orbus_6p
|
component hibi_orbus_6p
|
generic (
|
generic (
|
comm_width_g : integer := 5; -- HIBI command width
|
comm_width_g : integer := 5; -- HIBI command width
|
| Line 252... |
Line 266... |
-- HIBI bus <---> wrapper slave interface
|
-- HIBI bus <---> wrapper slave interface
|
bus_av_3_in : in std_logic;
|
bus_av_3_in : in std_logic;
|
bus_comm_3_in : in std_logic_vector(4 downto 0);
|
bus_comm_3_in : in std_logic_vector(4 downto 0);
|
bus_data_3_in : in std_logic_vector(31 downto 0);
|
bus_data_3_in : in std_logic_vector(31 downto 0);
|
bus_full_3_in : in std_logic;
|
bus_full_3_in : in std_logic;
|
bus_lock_3_in : in std_logic
|
bus_lock_3_in : in std_logic;
|
|
|
|
-- Interface: slave_4
|
|
-- HIBI bus <---> wrapper slave interface
|
|
bus_av_4_in : in std_logic;
|
|
bus_comm_4_in : in std_logic_vector(4 downto 0);
|
|
bus_data_4_in : in std_logic_vector(31 downto 0);
|
|
bus_full_4_in : in std_logic;
|
|
bus_lock_4_in : in std_logic;
|
|
|
|
-- Interface: slave_5
|
|
-- HIBI bus <---> wrapper slave interface
|
|
bus_av_5_in : in std_logic;
|
|
bus_comm_5_in : in std_logic_vector(4 downto 0);
|
|
bus_data_5_in : in std_logic_vector(31 downto 0);
|
|
bus_full_5_in : in std_logic;
|
|
bus_lock_5_in : in std_logic
|
|
|
);
|
);
|
end component;
|
end component;
|
|
|
-- HIBI bus wrapper, interface revision 4
|
-- HIBI bus wrapper, interface revision 4
|
| Line 362... |
Line 392... |
port map (
|
port map (
|
bus_av_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveAV,
|
bus_av_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveAV,
|
bus_av_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveAV,
|
bus_av_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveAV,
|
bus_av_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveAV,
|
bus_av_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveAV,
|
bus_av_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV,
|
bus_av_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV,
|
|
bus_av_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV,
|
|
bus_av_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV,
|
bus_av_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
|
bus_av_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
|
bus_comm_0_in(4 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM(4 downto 0),
|
bus_comm_0_in(4 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM(4 downto 0),
|
bus_comm_1_in(4 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM(4 downto 0),
|
bus_comm_1_in(4 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM(4 downto 0),
|
bus_comm_2_in(4 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM(4 downto 0),
|
bus_comm_2_in(4 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM(4 downto 0),
|
bus_comm_3_in(4 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM(4 downto 0),
|
bus_comm_3_in(4 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM(4 downto 0),
|
|
bus_comm_4_in(4 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM(4 downto 0),
|
|
bus_comm_5_in(4 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM(4 downto 0),
|
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
|
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
|
bus_data_0_in(31 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA(31 downto 0),
|
bus_data_0_in(31 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA(31 downto 0),
|
bus_data_1_in(31 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA(31 downto 0),
|
bus_data_1_in(31 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA(31 downto 0),
|
bus_data_2_in(31 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA(31 downto 0),
|
bus_data_2_in(31 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA(31 downto 0),
|
bus_data_3_in(31 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA(31 downto 0),
|
bus_data_3_in(31 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA(31 downto 0),
|
|
bus_data_4_in(31 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA(31 downto 0),
|
|
bus_data_5_in(31 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA(31 downto 0),
|
bus_data_out(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
|
bus_data_out(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
|
bus_full_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL,
|
bus_full_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL,
|
bus_full_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL,
|
bus_full_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL,
|
bus_full_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL,
|
bus_full_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL,
|
bus_full_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL,
|
bus_full_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL,
|
|
bus_full_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL,
|
|
bus_full_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL,
|
bus_full_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
|
bus_full_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
|
bus_lock_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK,
|
bus_lock_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK,
|
bus_lock_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK,
|
bus_lock_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK,
|
bus_lock_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK,
|
bus_lock_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK,
|
bus_lock_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK,
|
bus_lock_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK,
|
|
bus_lock_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK,
|
|
bus_lock_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK,
|
bus_lock_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK
|
bus_lock_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK
|
);
|
);
|
|
|
hibi_wrapper_r4_0 : hibi_wrapper_r4
|
hibi_wrapper_r4_0 : hibi_wrapper_r4
|
generic map (
|
generic map (
|
| Line 526... |
Line 566... |
bus_sync_clk => bus_sync_clk_3,
|
bus_sync_clk => bus_sync_clk_3,
|
rst_n => rst_n
|
rst_n => rst_n
|
);
|
);
|
|
|
hibi_wrapper_r4_4 : hibi_wrapper_r4
|
hibi_wrapper_r4_4 : hibi_wrapper_r4
|
|
generic map (
|
|
addr_g => ip_mSlave_4_addr_start,
|
|
addr_limit_g => ip_mSlave_4_addr_end
|
|
)
|
port map (
|
port map (
|
agent_av_in => agent_av_in_4,
|
agent_av_in => agent_av_in_4,
|
agent_av_out => agent_av_out_4,
|
agent_av_out => agent_av_out_4,
|
agent_clk => agent_clk_4,
|
agent_clk => agent_clk_4,
|
agent_comm_in(4 downto 0) => agent_comm_in_4(4 downto 0),
|
agent_comm_in(4 downto 0) => agent_comm_in_4(4 downto 0),
|
| Line 542... |
Line 586... |
agent_one_p_out => agent_one_p_out_4,
|
agent_one_p_out => agent_one_p_out_4,
|
agent_re_in => agent_re_in_4,
|
agent_re_in => agent_re_in_4,
|
agent_sync_clk => agent_sync_clk_4,
|
agent_sync_clk => agent_sync_clk_4,
|
agent_we_in => agent_we_in_4,
|
agent_we_in => agent_we_in_4,
|
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
|
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
|
|
bus_av_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV,
|
bus_clk => bus_clk_4,
|
bus_clk => bus_clk_4,
|
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
|
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
|
|
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM(4 downto 0),
|
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
|
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
|
|
bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA(31 downto 0),
|
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
|
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
|
|
bus_full_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL,
|
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
|
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
|
|
bus_lock_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK,
|
bus_sync_clk => bus_sync_clk_4,
|
bus_sync_clk => bus_sync_clk_4,
|
rst_n => rst_n
|
rst_n => rst_n
|
);
|
);
|
|
|
hibi_wrapper_r4_5 : hibi_wrapper_r4
|
hibi_wrapper_r4_5 : hibi_wrapper_r4
|
|
generic map (
|
|
addr_g => ip_mSlave_5_addr_start,
|
|
addr_limit_g => ip_mSlave_5_addr_end
|
|
)
|
port map (
|
port map (
|
agent_av_in => agent_av_in_5,
|
agent_av_in => agent_av_in_5,
|
agent_av_out => agent_av_out_5,
|
agent_av_out => agent_av_out_5,
|
agent_clk => agent_clk_5,
|
agent_clk => agent_clk_5,
|
agent_comm_in(4 downto 0) => agent_comm_in_5(4 downto 0),
|
agent_comm_in(4 downto 0) => agent_comm_in_5(4 downto 0),
|
| Line 568... |
Line 621... |
agent_one_p_out => agent_one_p_out_5,
|
agent_one_p_out => agent_one_p_out_5,
|
agent_re_in => agent_re_in_5,
|
agent_re_in => agent_re_in_5,
|
agent_sync_clk => agent_sync_clk_5,
|
agent_sync_clk => agent_sync_clk_5,
|
agent_we_in => agent_we_in_5,
|
agent_we_in => agent_we_in_5,
|
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
|
bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
|
|
bus_av_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV,
|
bus_clk => bus_clk_5,
|
bus_clk => bus_clk_5,
|
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
|
bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
|
|
bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM(4 downto 0),
|
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
|
bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
|
|
bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA(31 downto 0),
|
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
|
bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
|
|
bus_full_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL,
|
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
|
bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
|
|
bus_lock_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK,
|
bus_sync_clk => bus_sync_clk_5,
|
bus_sync_clk => bus_sync_clk_5,
|
rst_n => rst_n
|
rst_n => rst_n
|
);
|
);
|
|
|
end structural;
|
end structural;
|
