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https://opencores.org/ocsvn/g729a_codec/g729a_codec/trunk
[/] [g729a_codec/] [trunk/] [VHDL/] [G729A_asip_cpu_2w_p6.vhd] - Diff between revs 2 and 3
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| Rev 2 |
Rev 3 |
| Line 867... |
Line 867... |
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-- Pipeline stall logic
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-- Pipeline stall logic
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U_PSTL0 : G729A_ASIP_PSTLLOG_2W_P6
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U_PSTL0 : G729A_ASIP_PSTLLOG_2W_P6
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generic map(
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generic map(
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SIMULATION_ONLY => '1'
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SIMULATION_ONLY => SIMULATION_ONLY
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)
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)
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port map(
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port map(
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CLK_i => CLK_i,
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CLK_i => CLK_i,
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ID_INSTR_i => ID_INSTR0,
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ID_INSTR_i => ID_INSTR0,
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ID_V_i => IF_V_q2(0),
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ID_V_i => IF_V_q2(0),
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| Line 891... |
Line 891... |
PSTALL_o => ID_PS0
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PSTALL_o => ID_PS0
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);
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);
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U_PSTL1 : G729A_ASIP_PSTLLOG_2W_P6
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U_PSTL1 : G729A_ASIP_PSTLLOG_2W_P6
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generic map(
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generic map(
|
SIMULATION_ONLY => '1'
|
SIMULATION_ONLY => SIMULATION_ONLY
|
)
|
)
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port map(
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port map(
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CLK_i => CLK_i,
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CLK_i => CLK_i,
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ID_INSTR_i => ID_INSTR1,
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ID_INSTR_i => ID_INSTR1,
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ID_V_i => IF_V_q2(1),
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ID_V_i => IF_V_q2(1),
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