| Line 233... |
Line 233... |
end function;
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end function;
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|
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function get_dadr_ram(DADR : unsigned(ALEN-1 downto 0)) return unsigned is
|
function get_dadr_ram(DADR : unsigned(ALEN-1 downto 0)) return unsigned is
|
variable DADR_RAM : unsigned(12-1 downto 0);
|
variable DADR_RAM : unsigned(12-1 downto 0);
|
begin
|
begin
|
if(DADR(11 downto 10) /= "11") then
|
--if(DADR(11 downto 10) /= "11") then
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DADR_RAM(11 downto 10) := DADR(11 downto 10);
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-- DADR_RAM(11 downto 10) := DADR(11 downto 10);
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else
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--else
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DADR_RAM(11 downto 10) := "00";
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-- DADR_RAM(11 downto 10) := "00";
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end if;
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--end if;
|
DADR_RAM(9 downto 0) := DADR(9 downto 0);
|
--DADR_RAM(9 downto 0) := DADR(9 downto 0);
|
|
DADR_RAM(11 downto 0) := DADR(11 downto 0);
|
return(DADR_RAM);
|
return(DADR_RAM);
|
end function;
|
end function;
|
|
|
function get_dadr_rom(DADR : unsigned(ALEN-1 downto 0)) return unsigned is
|
function get_dadr_rom(DADR : unsigned(ALEN-1 downto 0)) return unsigned is
|
variable DADR_ROM : unsigned(12-1 downto 0);
|
variable DADR_ROM : unsigned(12-1 downto 0);
|
| Line 283... |
Line 284... |
signal DDATO : std_logic_vector(SDLEN-1 downto 0);
|
signal DDATO : std_logic_vector(SDLEN-1 downto 0);
|
|
|
signal DROM0_SEL,DROM1_SEL : std_logic;
|
signal DROM0_SEL,DROM1_SEL : std_logic;
|
signal DROM0_SEL_q,DROM1_SEL_q : std_logic;
|
signal DROM0_SEL_q,DROM1_SEL_q : std_logic;
|
signal DWE0_RAM : std_logic;
|
signal DWE0_RAM : std_logic;
|
signal DADR0_RAM : unsigned(log2(CMEM_LIMIT)-1 downto 0);
|
--signal DADR0_RAM : unsigned(log2(CMEM_LIMIT)-1 downto 0);
|
signal DADR1_RAM : unsigned(log2(CMEM_LIMIT)-1 downto 0);
|
--signal DADR1_RAM : unsigned(log2(CMEM_LIMIT)-1 downto 0);
|
signal DADR0_ROM : unsigned(log2(DMEM_SIZE-CMEM_LIMIT)-1 downto 0);
|
--signal DADR0_ROM : unsigned(log2(DMEM_SIZE-CMEM_LIMIT)-1 downto 0);
|
signal DADR1_ROM : unsigned(log2(DMEM_SIZE-CMEM_LIMIT)-1 downto 0);
|
--signal DADR1_ROM : unsigned(log2(DMEM_SIZE-CMEM_LIMIT)-1 downto 0);
|
|
signal DADR0_ROM : unsigned(log2(CMEM_LIMIT)-1 downto 0);
|
|
signal DADR1_ROM : unsigned(log2(CMEM_LIMIT)-1 downto 0);
|
|
signal DADR0_RAM : unsigned(log2(DMEM_SIZE-CMEM_LIMIT)-1 downto 0);
|
|
signal DADR1_RAM : unsigned(log2(DMEM_SIZE-CMEM_LIMIT)-1 downto 0);
|
signal DDATI0_RAM : std_logic_vector(SDLEN-1 downto 0);
|
signal DDATI0_RAM : std_logic_vector(SDLEN-1 downto 0);
|
signal DDATI1_RAM : std_logic_vector(SDLEN-1 downto 0);
|
signal DDATI1_RAM : std_logic_vector(SDLEN-1 downto 0);
|
signal DDATI0_ROM : std_logic_vector(SDLEN-1 downto 0);
|
signal DDATI0_ROM : std_logic_vector(SDLEN-1 downto 0);
|
signal DDATI1_ROM : std_logic_vector(SDLEN-1 downto 0);
|
signal DDATI1_ROM : std_logic_vector(SDLEN-1 downto 0);
|
|
|
| Line 541... |
Line 546... |
-- can be performed in parallel).
|
-- can be performed in parallel).
|
|
|
U_RAMD : G729_ASIP_RAM_1RW1R
|
U_RAMD : G729_ASIP_RAM_1RW1R
|
generic map(
|
generic map(
|
DWIDTH => SDLEN,
|
DWIDTH => SDLEN,
|
WCOUNT => DMEM_SIZE-CMEM_LIMIT
|
--WCOUNT => DMEM_SIZE-CMEM_LIMIT
|
|
WCOUNT => 4096
|
)
|
)
|
port map(
|
port map(
|
CLK_i => CLK_i,
|
CLK_i => CLK_i,
|
A_i => DADR0_RAM,
|
A_i => DADR0_RAM,
|
DPRA_i => DADR1_RAM,
|
DPRA_i => DADR1_RAM,
|
