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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- Testbench for the
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-- Testbench for the
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-- SNESpad controller core
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-- SNESpad controller core
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--
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--
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-- $Id: tb.vhd,v 1.1 2004-10-05 17:05:31 arniml Exp $
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-- $Id: tb.vhd,v 1.2 2004-10-05 18:19:08 arniml Exp $
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--
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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| Line 54... |
Line 54... |
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end tb;
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end tb;
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use work.snespad_pack.all;
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use work.snespad_pack.all;
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use work.snespad_comp.snespad;
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architecture behav of tb is
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architecture behav of tb is
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constant period_c : time := 100 ns;
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constant period_c : time := 100 ns;
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constant num_pads_c : natural := 2;
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constant num_pads_c : natural := 2;
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constant reset_level_c : natural := 0;
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constant reset_level_c : natural := 0;
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constant button_level_c : natural := 0;
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constant button_level_c : natural := 0;
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component snespad
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generic (
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num_pads_g : natural := 1;
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reset_level_g : natural := 0;
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button_level_g : natural := 0;
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clocks_per_6us_g : natural := 6
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);
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port (
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clk_i : in std_logic;
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reset_i : in std_logic;
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pad_clk_o : out std_logic;
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pad_latch_o : out std_logic;
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pad_data_i : in std_logic_vector(num_pads_g-1 downto 0);
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but_a_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_b_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_x_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_y_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_start_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_sel_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_tl_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_tr_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_up_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_down_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_left_o : out std_logic_vector(num_pads_g-1 downto 0);
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but_right_o : out std_logic_vector(num_pads_g-1 downto 0)
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);
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end component snespad;
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signal clk_s : std_logic;
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signal clk_s : std_logic;
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signal reset_s : std_logic;
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signal reset_s : std_logic;
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|
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signal pad_clk_s : std_logic;
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signal pad_clk_s : std_logic;
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| Line 244... |
Line 217... |
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- File History:
|
-- File History:
|
--
|
--
|
-- $Log: not supported by cvs2svn $
|
-- $Log: not supported by cvs2svn $
|
|
-- Revision 1.1 2004/10/05 17:05:31 arniml
|
|
-- initial check-in
|
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--
|
-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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|
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No newline at end of file
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No newline at end of file
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