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*/
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*/
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#ifndef INCLUDED_GECKO3COM_GPIF_H
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#ifndef INCLUDED_GECKO3COM_GPIF_H
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#define INCLUDED_GECKO3COM_GPIF_H
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#define INCLUDED_GECKO3COM_GPIF_H
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/** signal that a read (data flows from the FPGA to the FX2) in in progress */
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#define bmGPIF_READ_IN_PROGRESS 1
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#define bmGPIF_READ_IN_PROGRESS 1
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/** signal that there is data waiting in the OUT fifo to be handled */
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#define bmGPIF_PENDING_DATA 2
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#define bmGPIF_PENDING_DATA 2
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/** flag to signal, that the GPIF receives data from the FPGA */
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/** flag to signal, that the GPIF receives data from the FPGA */
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volatile static idata uint8_t flGPIF;
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volatile static idata uint8_t flGPIF;
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/** \brief initialize GPIF system
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/** \brief initialize GPIF system
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*
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*
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