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Rev 32 |
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Line 42... |
#define I2C_DEV_IO 0x41 /**< base adress of a I2C IO expander: 7-bits 1000001 */
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#define I2C_DEV_IO 0x41 /**< base adress of a I2C IO expander: 7-bits 1000001 */
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/**
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/**
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* offsets into boot eeprom for configuration values
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* offsets into boot eeprom for configuration values
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*/
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*/
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#define FPGA_TYPE_OFFSET 0x3FDD /**< ASCII string with the fpga type as it is in the bit file */
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/** ASCII string with the fpga type as it is in the bit file */
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#define FPGA_TYPE_LEN 16
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#define FPGA_TYPE_OFFSET 0x3FDD
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#define FPGA_IDCODE_OFFSET 0x3FED /**< the JTAG chip IDCODE is a 32 bit integer stored as 0x11223344 */
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#define FPGA_TYPE_LEN 16 /**< length of the FPGA type string */
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#define FPGA_IDCODE_LEN 10
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/** the JTAG chip IDCODE is a 32 bit integer stored as 0x11223344 */
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#define FPGA_IDCODE_OFFSET 0x3FED
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#define FPGA_IDCODE_LEN 10 /**< length of the IDCODE string */
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/** the hardware revision of this board, one char */
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#define HW_REV_OFFSET 0x3FF7
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#define HW_REV_OFFSET 0x3FF7
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#define SERIAL_NO_OFFSET 0x3FF8
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#define SERIAL_NO_OFFSET 0x3FF8 /**< place to store the serial number */
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#define SERIAL_NO_LEN 8
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#define SERIAL_NO_LEN 8 /**< length of the serial number string */
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#endif /* INCLUDED_GECKO3COM_I2C_H */
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#endif /* INCLUDED_GECKO3COM_I2C_H */
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