URL https://opencores.org/ocsvn/gecko3/gecko3/trunk

Subversion Repositories gecko3

[/] [gecko3/] [trunk/] [GECKO3COM/] [gecko3com-fw/] [firmware/] [include/] [gecko3com_regs.h] - Diff between revs 32 and 35

Rev 32	Rev 35
Line 71...	Line 71...
`#define SPI_OE OEA /*< SPI port direction register /`	`#define SPI_OE OEA /*< SPI port direction register /`
`#define bmSPI_CLK bmBIT0 /*< bitmask for SPI serial clock pin /`	`#define bmSPI_CLK bmBIT0 /*< bitmask for SPI serial clock pin /`
`#define bmSPI_MOSI bmBIT1 /*< bitmask for SPI MOSI pin, Master Out, Slave In /`	`#define bmSPI_MOSI bmBIT1 /*< bitmask for SPI MOSI pin, Master Out, Slave In /`
`#define bmSPI_MISO bmBIT2 /*< bitmask for SPI MISO pin, Master In, Slave Out /`	`#define bmSPI_MISO bmBIT2 /*< bitmask for SPI MISO pin, Master In, Slave Out /`
`#define bmSPI_MASK (bmSPI_CLK \| bmSPI_MOSI \| bmSPI_MISO)/*< SPI bus pin mask /`	`#define bmSPI_MASK (bmSPI_CLK \| bmSPI_MOSI \| bmSPI_MISO)/*< SPI bus pin mask /`
	`#define bmSPI_OE_MASK (bmSPI_CLK \| bmSPI_MOSI)/*< SPI bus output pin mask /`

`sbit at 0x80+0 bitSPI_CLK; /*< \define 0x80 is the bit address of PORT A /`	`sbit at 0x80+0 bitSPI_CLK; /*< \define 0x80 is the bit address of PORT A /`
`sbit at 0x80+1 bitSPI_MOSI; /*< \define Output from FX2 point of view, Master Out, Slave In /`	`sbit at 0x80+1 bitSPI_MOSI; /*< \define Output from FX2 point of view, Master Out, Slave In /`
`sbit at 0x80+2 bitSPI_MISO; /*< \define In from FX2 point of view, Master In, Slave Out /`	`sbit at 0x80+2 bitSPI_MISO; /*< \define In from FX2 point of view, Master In, Slave Out /`

Rev 32	Rev 35
Line 71...	Line 71...
`#define SPI_OE OEA /*< SPI port direction register /`	`#define SPI_OE OEA /*< SPI port direction register /`
`#define bmSPI_CLK bmBIT0 /*< bitmask for SPI serial clock pin /`	`#define bmSPI_CLK bmBIT0 /*< bitmask for SPI serial clock pin /`
`#define bmSPI_MOSI bmBIT1 /*< bitmask for SPI MOSI pin, Master Out, Slave In /`	`#define bmSPI_MOSI bmBIT1 /*< bitmask for SPI MOSI pin, Master Out, Slave In /`
`#define bmSPI_MISO bmBIT2 /*< bitmask for SPI MISO pin, Master In, Slave Out /`	`#define bmSPI_MISO bmBIT2 /*< bitmask for SPI MISO pin, Master In, Slave Out /`
`#define bmSPI_MASK (bmSPI_CLK \| bmSPI_MOSI \| bmSPI_MISO)/*< SPI bus pin mask /`	`#define bmSPI_MASK (bmSPI_CLK \| bmSPI_MOSI \| bmSPI_MISO)/*< SPI bus pin mask /`
	`#define bmSPI_OE_MASK (bmSPI_CLK \| bmSPI_MOSI)/*< SPI bus output pin mask /`

`sbit at 0x80+0 bitSPI_CLK; /*< \define 0x80 is the bit address of PORT A /`	`sbit at 0x80+0 bitSPI_CLK; /*< \define 0x80 is the bit address of PORT A /`
`sbit at 0x80+1 bitSPI_MOSI; /*< \define Output from FX2 point of view, Master Out, Slave In /`	`sbit at 0x80+1 bitSPI_MOSI; /*< \define Output from FX2 point of view, Master Out, Slave In /`
`sbit at 0x80+2 bitSPI_MISO; /*< \define In from FX2 point of view, Master In, Slave Out /`	`sbit at 0x80+2 bitSPI_MISO; /*< \define In from FX2 point of view, Master In, Slave Out /`