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[/] [gecko3/] [trunk/] [GECKO3COM/] [gecko3com-ip/] [core/] [GECKO3COM_simple_fsm.vhd] - Diff between revs 27 and 28

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Rev 27 Rev 28
Line 140... Line 140...
 
 
 
 
begin  -- fsm
begin  -- fsm
 
 
  o_receive_fifo_wr_en         <= s_receive_fifo_wr_en;
  o_receive_fifo_wr_en         <= s_receive_fifo_wr_en;
  o_receive_fifo_reset         <= s_receive_fifo_reset;
 
  o_receive_transfersize_en    <= s_receive_transfersize_en;
  o_receive_transfersize_en    <= s_receive_transfersize_en;
  o_receive_counter_load       <= s_receive_counter_load;
  o_receive_counter_load       <= s_receive_counter_load;
  o_receive_counter_en         <= s_receive_counter_en;
  o_receive_counter_en         <= s_receive_counter_en;
  o_btag_reg_en                <= s_btag_reg_en;
  o_btag_reg_en                <= s_btag_reg_en;
  o_nbtag_reg_en               <= s_nbtag_reg_en;
  o_nbtag_reg_en               <= s_nbtag_reg_en;
  o_send_fifo_rd_en            <= s_send_fifo_rd_en;
  o_send_fifo_rd_en            <= s_send_fifo_rd_en;
  o_send_fifo_reset            <= s_send_fifo_reset;
 
  o_send_counter_load          <= s_send_counter_load;
  o_send_counter_load          <= s_send_counter_load;
  o_send_counter_en            <= s_send_counter_en;
  o_send_counter_en            <= s_send_counter_en;
  o_send_mux_sel               <= s_send_mux_sel;
  o_send_mux_sel               <= s_send_mux_sel;
  o_send_finished              <= s_send_finished;
  o_send_finished              <= s_send_finished;
  o_receive_newdata_set        <= s_receive_newdata_set;
  o_receive_newdata_set        <= s_receive_newdata_set;
Line 165... Line 163...
  SYNC_PROC : process (i_sysclk)
  SYNC_PROC : process (i_sysclk)
  begin
  begin
    if (i_sysclk'event and i_sysclk = '1') then
    if (i_sysclk'event and i_sysclk = '1') then
      if (i_nReset = '0') then
      if (i_nReset = '0') then
        state <= st1_idle;
        state <= st1_idle;
 
 
 
        o_receive_fifo_reset         <= '0';
 
        o_send_fifo_reset            <= '0';
      else
      else
        state <= next_state;
        state <= next_state;
 
 
 
        o_receive_fifo_reset         <= s_receive_fifo_reset;
 
        o_send_fifo_reset            <= s_send_fifo_reset;
      end if;
      end if;
    end if;
    end if;
  end process;
  end process;
 
 
  --MEALY State-Machine - Outputs based on state and inputs
  --MEALY State-Machine - Outputs based on state and inputs
Line 270... Line 274...
 
 
    if state = st20_send_attributes then
    if state = st20_send_attributes then
      s_send_counter_load <= '1';
      s_send_counter_load <= '1';
    end if;
    end if;
 
 
    if (state = st21_send_reserved and i_gpif_tx_full = '0' and
    if --(state = st21_send_reserved and i_gpif_tx_full = '0' and
        i_send_fifo_empty = '0')
        --i_send_fifo_empty = '0')
      or (state = st22_send_data and
      (state = st22_send_data and
          i_gpif_tx_full = '0' and
          i_gpif_tx_full = '0' and
          i_send_fifo_empty = '0' and
          i_send_fifo_empty = '0' and
          i_send_counter_zero = '0')
          i_send_counter_zero = '0')
      or (state = st23_send_wait and
      or (state = st23_send_wait and
          i_gpif_tx_full = '0' and
          i_gpif_tx_full = '0' and

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