OpenCores
URL https://opencores.org/ocsvn/gecko3/gecko3/trunk

Subversion Repositories gecko3

[/] [gecko3/] [trunk/] [GECKO3COM/] [gecko3com-ip/] [core/] [gecko3com_test_chipscope.cdc] - Diff between revs 18 and 20

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 18 Rev 20
Line 1... Line 1...
#ChipScope Core Inserter Project File Version 3.0
#ChipScope Core Inserter Project File Version 3.0
#Wed Jan 13 10:18:17 CET 2010
#Tue Jan 26 16:27:50 CET 2010
Project.device.designInputFile=/home/chrigi/bfh-work/GECKO3COM/gecko3com-ip/core/gpif_com_test_cs.ngc
Project.device.designInputFile=/home/chrigi/bfh-work/GECKO3COM/gecko3com-ip/core/gpif_com_test_cs.ngc
Project.device.designOutputFile=/home/chrigi/bfh-work/GECKO3COM/gecko3com-ip/core/gpif_com_test_cs.ngc
Project.device.designOutputFile=/home/chrigi/bfh-work/GECKO3COM/gecko3com-ip/core/gpif_com_test_cs.ngc
Project.device.deviceFamily=6
Project.device.deviceFamily=6
Project.device.enableRPMs=true
Project.device.enableRPMs=true
Project.device.outputDirectory=/home/chrigi/bfh-work/GECKO3COM/gecko3com-ip/core/_ngo
Project.device.outputDirectory=/home/chrigi/bfh-work/GECKO3COM/gecko3com-ip/core/_ngo
Line 13... Line 13...
Project.icon.enableExtTriggerIn=false
Project.icon.enableExtTriggerIn=false
Project.icon.enableExtTriggerOut=false
Project.icon.enableExtTriggerOut=false
Project.icon.triggerInPinName=
Project.icon.triggerInPinName=
Project.icon.triggerOutPinName=
Project.icon.triggerOutPinName=
Project.unit.dimension=1
Project.unit.dimension=1
Project.unit<0>.clockChannel=i_SYSCLK_BUFGP
Project.unit<0>.clockChannel=i_IFCLK_BUFGP
Project.unit<0>.clockEdge=Rising
Project.unit<0>.clockEdge=Rising
Project.unit<0>.dataChannel<0>=o_WRX_OBUF
Project.unit<0>.dataChannel<0>=o_WRX_OBUF
Project.unit<0>.dataChannel<10>=GPIF_INTERFACE s_dbus_out<8>
Project.unit<0>.dataChannel<10>=GPIF_INTERFACE s_dbus_out<8>
Project.unit<0>.dataChannel<11>=GPIF_INTERFACE s_dbus_out<9>
Project.unit<0>.dataChannel<11>=GPIF_INTERFACE s_dbus_out<9>
Project.unit<0>.dataChannel<12>=GPIF_INTERFACE s_dbus_out<10>
Project.unit<0>.dataChannel<12>=GPIF_INTERFACE s_dbus_out<10>
Line 30... Line 30...
Project.unit<0>.dataChannel<19>=GPIF_INTERFACE o_RX
Project.unit<0>.dataChannel<19>=GPIF_INTERFACE o_RX
Project.unit<0>.dataChannel<1>=i_RDYU_IBUF
Project.unit<0>.dataChannel<1>=i_RDYU_IBUF
Project.unit<0>.dataChannel<20>=GPIF_INTERFACE o_TX
Project.unit<0>.dataChannel<20>=GPIF_INTERFACE o_TX
Project.unit<0>.dataChannel<21>=GPIF_INTERFACE s_U2X_AM_FULL
Project.unit<0>.dataChannel<21>=GPIF_INTERFACE s_U2X_AM_FULL
Project.unit<0>.dataChannel<22>=GPIF_INTERFACE s_U2X_WR_EN
Project.unit<0>.dataChannel<22>=GPIF_INTERFACE s_U2X_WR_EN
Project.unit<0>.dataChannel<23>=GPIF_INTERFACE s_U2X_FULL
Project.unit<0>.dataChannel<23>=GPIF_INTERFACE s_X2U_EMPTY
Project.unit<0>.dataChannel<24>=GPIF_INTERFACE o_RDYX
Project.unit<0>.dataChannel<24>=GPIF_INTERFACE o_RDYX
Project.unit<0>.dataChannel<25>=s_RX_DATA<0>
Project.unit<0>.dataChannel<25>=s_RX_DATA<0>
Project.unit<0>.dataChannel<26>=s_RX_DATA<1>
Project.unit<0>.dataChannel<26>=s_RX_DATA<1>
Project.unit<0>.dataChannel<27>=s_RX_DATA<2>
Project.unit<0>.dataChannel<27>=s_RX_DATA<2>
Project.unit<0>.dataChannel<28>=s_RX_DATA<3>
Project.unit<0>.dataChannel<28>=s_RX_DATA<3>
Line 52... Line 52...
Project.unit<0>.dataChannel<39>=s_RX_DATA<14>
Project.unit<0>.dataChannel<39>=s_RX_DATA<14>
Project.unit<0>.dataChannel<3>=GPIF_INTERFACE s_dbus_out<1>
Project.unit<0>.dataChannel<3>=GPIF_INTERFACE s_dbus_out<1>
Project.unit<0>.dataChannel<40>=s_RX_DATA<15>
Project.unit<0>.dataChannel<40>=s_RX_DATA<15>
Project.unit<0>.dataChannel<41>=s_EMPTY
Project.unit<0>.dataChannel<41>=s_EMPTY
Project.unit<0>.dataChannel<42>=i_WRU_IBUF
Project.unit<0>.dataChannel<42>=i_WRU_IBUF
Project.unit<0>.dataChannel<43>=o_WRX_OBUF
Project.unit<0>.dataChannel<43>=GPIF_INTERFACE s_X2U_RD_EN
Project.unit<0>.dataChannel<44>=s_RD_EN
Project.unit<0>.dataChannel<44>=s_RD_EN
 
Project.unit<0>.dataChannel<45>=GPIF_INTERFACE i_EOM
 
Project.unit<0>.dataChannel<46>=GPIF_INTERFACE s_X2U_FULL_IFCLK
Project.unit<0>.dataChannel<4>=GPIF_INTERFACE s_dbus_out<2>
Project.unit<0>.dataChannel<4>=GPIF_INTERFACE s_dbus_out<2>
Project.unit<0>.dataChannel<5>=GPIF_INTERFACE s_dbus_out<3>
Project.unit<0>.dataChannel<5>=GPIF_INTERFACE s_dbus_out<3>
Project.unit<0>.dataChannel<6>=GPIF_INTERFACE s_dbus_out<4>
Project.unit<0>.dataChannel<6>=GPIF_INTERFACE s_dbus_out<4>
Project.unit<0>.dataChannel<7>=GPIF_INTERFACE s_dbus_out<5>
Project.unit<0>.dataChannel<7>=GPIF_INTERFACE s_dbus_out<5>
Project.unit<0>.dataChannel<8>=GPIF_INTERFACE s_dbus_out<6>
Project.unit<0>.dataChannel<8>=GPIF_INTERFACE s_dbus_out<6>
Project.unit<0>.dataChannel<9>=GPIF_INTERFACE s_dbus_out<7>
Project.unit<0>.dataChannel<9>=GPIF_INTERFACE s_dbus_out<7>
Project.unit<0>.dataDepth=512
Project.unit<0>.dataDepth=512
Project.unit<0>.dataEqualsTrigger=false
Project.unit<0>.dataEqualsTrigger=false
Project.unit<0>.dataPortWidth=45
Project.unit<0>.dataPortWidth=47
Project.unit<0>.enableGaps=false
Project.unit<0>.enableGaps=false
Project.unit<0>.enableStorageQualification=true
Project.unit<0>.enableStorageQualification=true
Project.unit<0>.enableTimestamps=false
Project.unit<0>.enableTimestamps=false
Project.unit<0>.timestampDepth=0
Project.unit<0>.timestampDepth=0
Project.unit<0>.timestampWidth=0
Project.unit<0>.timestampWidth=0
Project.unit<0>.triggerChannel<0><0>=i_WRU_IBUF
Project.unit<0>.triggerChannel<0><0>=i_WRU_IBUF
Project.unit<0>.triggerChannel<0><1>=o_WRX_OBUF
Project.unit<0>.triggerChannel<0><1>=o_WRX_OBUF
Project.unit<0>.triggerChannel<0><2>=o_RDYX_OBUF
Project.unit<0>.triggerChannel<0><2>=o_RDYX_OBUF
Project.unit<0>.triggerChannel<0><3>=i_RDYU_IBUF
Project.unit<0>.triggerChannel<0><3>=i_RDYU_IBUF
 
Project.unit<0>.triggerChannel<0><4>=GPIF_INTERFACE F_IN o_full
 
Project.unit<0>.triggerChannel<0><5>=GPIF_INTERFACE F_OUT o_empty
 
Project.unit<0>.triggerChannel<0><6>=GPIF_INTERFACE i_EOM
Project.unit<0>.triggerConditionCountWidth=0
Project.unit<0>.triggerConditionCountWidth=0
Project.unit<0>.triggerMatchCount<0>=1
Project.unit<0>.triggerMatchCount<0>=1
Project.unit<0>.triggerMatchCountWidth<0><0>=0
Project.unit<0>.triggerMatchCountWidth<0><0>=0
Project.unit<0>.triggerMatchType<0><0>=1
Project.unit<0>.triggerMatchType<0><0>=1
Project.unit<0>.triggerPortCount=1
Project.unit<0>.triggerPortCount=1
Project.unit<0>.triggerPortIsData<0>=true
Project.unit<0>.triggerPortIsData<0>=true
Project.unit<0>.triggerPortWidth<0>=4
Project.unit<0>.triggerPortWidth<0>=7
Project.unit<0>.triggerSequencerLevels=16
Project.unit<0>.triggerSequencerLevels=16
Project.unit<0>.triggerSequencerType=1
Project.unit<0>.triggerSequencerType=1
Project.unit<0>.type=ilapro
Project.unit<0>.type=ilapro

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.