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Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.6 2003/11/06 13:59:07 gorand
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// added support for 8-bit access to registers.
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//
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// Revision 1.2 2003/10/02 18:54:35 simons
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// Revision 1.2 2003/10/02 18:54:35 simons
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// GPIO signals muxed with other peripherals, higland_board fixed.
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// GPIO signals muxed with other peripherals, higland_board fixed.
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//
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//
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// Revision 1.1.1.1 2003/06/24 09:09:23 simons
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// Revision 1.1.1.1 2003/06/24 09:09:23 simons
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// This files were moved here from toplevel folder.
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// This files were moved here from toplevel folder.
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Line 177... |
//
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//
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// By default it is defined.
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// By default it is defined.
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//
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//
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//`define GPIO_STRICT_32BIT_ACCESS
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//`define GPIO_STRICT_32BIT_ACCESS
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//
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//
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`ifndef GPIO_STRICT_32BIT_ACCESS
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`ifdef GPIO_STRICT_32BIT_ACCESS
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`else
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// added by gorand :
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// added by gorand :
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// if GPIO_STRICT_32BIT_ACCESS is not defined,
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// if GPIO_STRICT_32BIT_ACCESS is not defined,
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// depending on number of gpio I/O lines, the following are defined :
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// depending on number of gpio I/O lines, the following are defined :
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// if the number of I/O lines is in range 1-8, GPIO_WB_BYTES1 is defined,
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// if the number of I/O lines is in range 1-8, GPIO_WB_BYTES1 is defined,
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// if the number of I/O lines is in range 9-16, GPIO_WB_BYTES2 is defined,
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// if the number of I/O lines is in range 9-16, GPIO_WB_BYTES2 is defined,
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