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https://opencores.org/ocsvn/gpio/gpio/trunk
[/] [gpio/] [tags/] [rel_5/] [rtl/] [verilog/] [gpio_top.v] - Diff between revs 26 and 29
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| Rev 26 |
Rev 29 |
| Line 43... |
Line 43... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.11 2002/03/13 20:56:28 lampret
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// Removed zero padding as per Avi Shamli suggestion.
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//
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// Revision 1.10 2002/03/13 20:47:57 lampret
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// Revision 1.10 2002/03/13 20:47:57 lampret
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// Ports changed per Ran Aviram suggestions.
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// Ports changed per Ran Aviram suggestions.
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//
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//
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// Revision 1.9 2002/03/09 03:43:27 lampret
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// Revision 1.9 2002/03/09 03:43:27 lampret
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// Interrupt is asserted only when an input changes (code patch by Jacob Gorban)
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// Interrupt is asserted only when an input changes (code patch by Jacob Gorban)
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| Line 420... |
Line 423... |
//
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//
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// Posedge pext_clk is inverted by NEC bit if negedge flops are not allowed.
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// Posedge pext_clk is inverted by NEC bit if negedge flops are not allowed.
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// If negedge flops are allowed, pext_clk only clocks posedge flops.
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// If negedge flops are allowed, pext_clk only clocks posedge flops.
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//
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//
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`ifdef GPIO_NO_NEGEDGE_FLOPS
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`ifdef GPIO_NO_NEGEDGE_FLOPS
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`ifdef GPIO_NO_CLKPAD_LOGIC
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assign pext_clk = clk_pad_i;
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`else
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assign pext_clk = rgpio_ctrl[`GPIO_RGPIO_CTRL_NEC] ? ~clk_pad_i : clk_pad_i;
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assign pext_clk = rgpio_ctrl[`GPIO_RGPIO_CTRL_NEC] ? ~clk_pad_i : clk_pad_i;
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`endif
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`else
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`else
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assign pext_clk = clk_pad_i;
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assign pext_clk = clk_pad_i;
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`endif
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`endif
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//
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//
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