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[/] [gpio/] [tags/] [rel_9/] [rtl/] [verilog/] [gpio_top.v] - Diff between revs 25 and 26

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Rev 25 Rev 26
Line 43... Line 43...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.10  2002/03/13 20:47:57  lampret
 
// Ports changed per Ran Aviram suggestions.
 
//
// Revision 1.9  2002/03/09 03:43:27  lampret
// Revision 1.9  2002/03/09 03:43:27  lampret
// Interrupt is asserted only when an input changes (code patch by Jacob Gorban)
// Interrupt is asserted only when an input changes (code patch by Jacob Gorban)
//
//
// Revision 1.8  2002/01/14 19:06:28  lampret
// Revision 1.8  2002/01/14 19:06:28  lampret
// Changed registered WISHBONE outputs wb_ack_o/wb_err_o to follow WB specification.
// Changed registered WISHBONE outputs wb_ack_o/wb_err_o to follow WB specification.
Line 460... Line 463...
always @(wb_adr_i or rgpio_in or rgpio_out or rgpio_oe or rgpio_inte or
always @(wb_adr_i or rgpio_in or rgpio_out or rgpio_oe or rgpio_inte or
                rgpio_ptrig or rgpio_aux or rgpio_ctrl or rgpio_ints)
                rgpio_ptrig or rgpio_aux or rgpio_ctrl or rgpio_ints)
        case (wb_adr_i[`GPIO_OFS_BITS]) // synopsys full_case parallel_case
        case (wb_adr_i[`GPIO_OFS_BITS]) // synopsys full_case parallel_case
`ifdef GPIO_READREGS
`ifdef GPIO_READREGS
                `GPIO_RGPIO_OUT: begin
                `GPIO_RGPIO_OUT: begin
                        wb_dat[dw-1:0] = {{dw-gw{1'b0}}, rgpio_out};
                        wb_dat[dw-1:0] = rgpio_out;
                end
                end
                `GPIO_RGPIO_OE: begin
                `GPIO_RGPIO_OE: begin
                        wb_dat[dw-1:0] = {{dw-gw{1'b0}}, ~rgpio_oe};
                        wb_dat[dw-1:0] = ~rgpio_oe;
                end
                end
                `GPIO_RGPIO_INTE: begin
                `GPIO_RGPIO_INTE: begin
                        wb_dat[dw-1:0] = {{dw-gw{1'b0}}, rgpio_inte};
                        wb_dat[dw-1:0] = rgpio_inte;
                end
                end
                `GPIO_RGPIO_PTRIG: begin
                `GPIO_RGPIO_PTRIG: begin
                        wb_dat[dw-1:0] = {{dw-gw{1'b0}}, rgpio_ptrig};
                        wb_dat[dw-1:0] = rgpio_ptrig;
                end
                end
                `GPIO_RGPIO_AUX: begin
                `GPIO_RGPIO_AUX: begin
                        wb_dat[dw-1:0] = {{dw-gw{1'b0}}, rgpio_aux};
                        wb_dat[dw-1:0] = rgpio_aux;
                end
                end
                `GPIO_RGPIO_CTRL: begin
                `GPIO_RGPIO_CTRL: begin
                        wb_dat[3:0] = rgpio_ctrl;
                        wb_dat[3:0] = rgpio_ctrl;
                        wb_dat[dw-1:4] = {dw-4{1'b0}};
                        wb_dat[dw-1:4] = {dw-4{1'b0}};
                end
                end
`endif
`endif
                `GPIO_RGPIO_INTS: begin
                `GPIO_RGPIO_INTS: begin
                        wb_dat[dw-1:0] = {{dw-gw{1'b0}}, rgpio_ints};
                        wb_dat[dw-1:0] = rgpio_ints;
                end
                end
                default: begin
                default: begin
                        wb_dat[dw-1:0] = {{dw-gw{1'b0}}, rgpio_in};
                        wb_dat[dw-1:0] = rgpio_in;
                end
                end
        endcase
        endcase
 
 
//
//
// WB data output
// WB data output

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