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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.14 2003/11/06 13:59:07 gorand
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// added support for 8-bit access to registers.
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//
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// Revision 1.13 2002/11/18 22:35:18 lampret
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// Revision 1.13 2002/11/18 22:35:18 lampret
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// Bug fix. Interrupts were also asserted when condition was not met.
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// Bug fix. Interrupts were also asserted when condition was not met.
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//
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//
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// Revision 1.12 2002/11/11 21:36:28 lampret
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// Revision 1.12 2002/11/11 21:36:28 lampret
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// Added ifdef to remove mux from clk_pad_i if mux is not allowed. This also removes RGPIO_CTRL[NEC].
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// Added ifdef to remove mux from clk_pad_i if mux is not allowed. This also removes RGPIO_CTRL[NEC].
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Line 394... |
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//
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//
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// Write to RGPIO_OE. Bits in RGPIO_OE are stored inverted.
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// Write to RGPIO_OE. Bits in RGPIO_OE are stored inverted.
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//
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//
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`ifdef GPIO_RGPIO_OE
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`ifdef GPIO_RGPIO_OE
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always @(posedge ~wb_clk_i or posedge ~wb_rst_i)
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always @(posedge wb_clk_i or posedge wb_rst_i)
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if (~wb_rst_i)
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if (wb_rst_i)
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rgpio_oe <= #1 {gw{1'b0}};
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rgpio_oe <= #1 {gw{1'b0}};
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else if (rgpio_oe_sel && ~wb_we_i)
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else if (rgpio_oe_sel && wb_we_i)
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begin
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begin
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`ifdef GPIO_STRICT_32BIT_ACCESS
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`ifdef GPIO_STRICT_32BIT_ACCESS
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rgpio_oe <= #1 ~wb_dat_i[gw-1:0];
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rgpio_oe <= #1 ~wb_dat_i[gw-1:0];
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`endif
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`endif
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`ifdef GPIO_WB_BYTES4
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`ifdef GPIO_WB_BYTES4
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if ( ~wb_sel_i [3] == 1'b1 )
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if ( wb_sel_i [3] == 1'b1 )
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rgpio_oe [gw-1:24] <= #1 ~wb_dat_i [gw-1:24] ;
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rgpio_oe [gw-1:24] <= #1 ~wb_dat_i [gw-1:24] ;
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if ( ~wb_sel_i [2] == 1'b1 )
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if ( wb_sel_i [2] == 1'b1 )
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rgpio_oe [23:16] <= #1 ~wb_dat_i [23:16] ;
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rgpio_oe [23:16] <= #1 ~wb_dat_i [23:16] ;
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if ( ~wb_sel_i [1] == 1'b1 )
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if ( wb_sel_i [1] == 1'b1 )
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rgpio_oe [15:8] <= #1 ~wb_dat_i [15:8] ;
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rgpio_oe [15:8] <= #1 ~wb_dat_i [15:8] ;
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if ( ~wb_sel_i [0] == 1'b1 )
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if ( wb_sel_i [0] == 1'b1 )
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rgpio_oe [7:0] <= #1 ~wb_dat_i [7:0] ;
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rgpio_oe [7:0] <= #1 ~wb_dat_i [7:0] ;
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`endif
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`endif
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`ifdef GPIO_WB_BYTES3
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`ifdef GPIO_WB_BYTES3
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if ( ~wb_sel_i [2] == 1'b1 )
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if ( wb_sel_i [2] == 1'b1 )
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rgpio_oe [gw-1:16] <= #1 ~wb_dat_i [gw-1:16] ;
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rgpio_oe [gw-1:16] <= #1 ~wb_dat_i [gw-1:16] ;
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if ( ~wb_sel_i [1] == 1'b1 )
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if ( wb_sel_i [1] == 1'b1 )
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rgpio_oe [15:8] <= #1 ~wb_dat_i [15:8] ;
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rgpio_oe [15:8] <= #1 ~wb_dat_i [15:8] ;
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if ( ~wb_sel_i [0] == 1'b1 )
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if ( wb_sel_i [0] == 1'b1 )
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rgpio_oe [7:0] <= #1 ~wb_dat_i [7:0] ;
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rgpio_oe [7:0] <= #1 ~wb_dat_i [7:0] ;
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`endif
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`endif
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`ifdef GPIO_WB_BYTES2
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`ifdef GPIO_WB_BYTES2
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if ( ~wb_sel_i [1] == 1'b1 )
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if ( wb_sel_i [1] == 1'b1 )
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rgpio_oe [gw-1:8] <= #1 ~wb_dat_i [gw-1:8] ;
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rgpio_oe [gw-1:8] <= #1 ~wb_dat_i [gw-1:8] ;
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if ( ~wb_sel_i [0] == 1'b1 )
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if ( wb_sel_i [0] == 1'b1 )
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rgpio_oe [7:0] <= #1 ~wb_dat_i [7:0] ;
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rgpio_oe [7:0] <= #1 ~wb_dat_i [7:0] ;
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`endif
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`endif
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`ifdef GPIO_WB_BYTES1
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`ifdef GPIO_WB_BYTES1
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if ( ~wb_sel_i [0] == 1'b1 )
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if ( wb_sel_i [0] == 1'b1 )
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rgpio_oe [gw-1:0] <= #1 ~wb_dat_i [gw-1:0] ;
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rgpio_oe [gw-1:0] <= #1 ~wb_dat_i [gw-1:0] ;
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`endif
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`endif
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end
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end
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`else
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`else
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