URL https://opencores.org/ocsvn/gpio/gpio/trunk

Subversion Repositories gpio

[/] [gpio/] [trunk/] [bench/] [verilog/] [tb_tasks.v] - Diff between revs 8 and 12

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Rev 8	Rev 12
Line 42...	Line 42...
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.1 2001/08/21 21:39:27 lampret`
	`// Changed directory structure, port names and drfines.`
	`//`
`// Revision 1.2 2001/07/14 20:37:23 lampret`	`// Revision 1.2 2001/07/14 20:37:23 lampret`
`// Test bench improvements.`	`// Test bench improvements.`
`//`	`//`
`// Revision 1.1 2001/06/05 07:45:22 lampret`	`// Revision 1.1 2001/06/05 07:45:22 lampret`
`// Added initial RTL and test benches. There are still some issues with these files.`	`// Added initial RTL and test benches. There are still some issues with these files.`
`//`	`//`
`//`	`//`

`include "timescale.v"	`include "timescale.v"
`include "defines.v"	`include "gpio_defines.v"
`include "tb_defines.v"	`include "tb_defines.v"

`module tb_tasks;`	`module tb_tasks;`

`integer nr_failed;`	`integer nr_failed;`
Line 675...	Line 678...

`// Advance time`	`// Advance time`
`#100;`	`#100;`

`// Sample interrupt request. Should be zero.`	`// Sample interrupt request. Should be zero.`
`l1 = tb_top.gpio.wb_inta_o;`	`l1 = tb_top.gpio_top.wb_inta_o;`

`// Clear gpio_in pins`	`// Clear gpio_in pins`
`tb_top.gpio_mon.set_gpioin(0);`	`tb_top.gpio_mon.set_gpioin(0);`

`// Advance time`	`// Advance time`
`#100;`	`#100;`

`// Sample interrupt request. Should be one.`	`// Sample interrupt request. Should be one.`
`l2 = tb_top.gpio.wb_inta_o;`	`l2 = tb_top.gpio_top.wb_inta_o;`

`// Clear interrupt request`	`// Clear interrupt request`
`setctrl(0);`	`setctrl(0);`

`// Advance time`	`// Advance time`
`#100;`	`#100;`

`// Sample interrupt request. Should be zero.`	`// Sample interrupt request. Should be zero.`
`l3 = tb_top.gpio.wb_inta_o;`	`l3 = tb_top.gpio_top.wb_inta_o;`

`// Check for errors`	`// Check for errors`
`if (l1 \|\| !l2 \|\| l3)`	`if (l1 \|\| !l2 \|\| l3)`
`err = err +1;`	`err = err +1;`
`end`	`end`
Line 755...	Line 758...

`// Advance time`	`// Advance time`
`#100;`	`#100;`

`// Sample interrupt request. Should be zero.`	`// Sample interrupt request. Should be zero.`
`l1 = tb_top.gpio.wb_inta_o;`	`l1 = tb_top.gpio_top.wb_inta_o;`

`// Clear gpio_in pins`	`// Clear gpio_in pins`
`tb_top.gpio_mon.set_gpioin('hffffffff);`	`tb_top.gpio_mon.set_gpioin('hffffffff);`

`// Advance time`	`// Advance time`
`#100;`	`#100;`

`// Sample interrupt request. Should be one.`	`// Sample interrupt request. Should be one.`
`l2 = tb_top.gpio.wb_inta_o;`	`l2 = tb_top.gpio_top.wb_inta_o;`

`// Clear interrupt request`	`// Clear interrupt request`
`setctrl(0);`	`setctrl(0);`

`// Advance time`	`// Advance time`
`#100;`	`#100;`

`// Sample interrupt request. Should be zero.`	`// Sample interrupt request. Should be zero.`
`l3 = tb_top.gpio.wb_inta_o;`	`l3 = tb_top.gpio_top.wb_inta_o;`

`// Check for errors`	`// Check for errors`
`if (l1 \|\| !l2 \|\| l3)`	`if (l1 \|\| !l2 \|\| l3)`
`err = err +1;`	`err = err +1;`
`end`	`end`
Line 797...	Line 800...
`endtask`	`endtask`

`//`	`//`
`// Do continues check for interrupts`	`// Do continues check for interrupts`
`//`	`//`
`always @(posedge tb_top.gpio.wb_inta_o)`	`always @(posedge tb_top.gpio_top.wb_inta_o)`
`if (ints_disabled) begin`	`if (ints_disabled) begin`
`$display("Spurious interrupt detected. ");`	`$display("Spurious interrupt detected. ");`
`failed;`	`failed;`
`ints_working = 9876;`	`ints_working = 9876;`
`$display;`	`$display;`

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[/] [gpio/] [trunk/] [bench/] [verilog/] [tb_tasks.v] - Diff between revs 8 and 12