| Line 42... |
Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.3 2001/09/18 16:37:55 lampret
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// Changed VCD output location.
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//
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// Revision 1.2 2001/09/18 15:43:27 lampret
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// Revision 1.2 2001/09/18 15:43:27 lampret
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// Changed gpio top level into gpio_top. Changed defines.v into gpio_defines.v.
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// Changed gpio top level into gpio_top. Changed defines.v into gpio_defines.v.
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//
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//
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// Revision 1.1 2001/08/21 21:39:27 lampret
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// Revision 1.1 2001/08/21 21:39:27 lampret
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// Changed directory structure, port names and drfines.
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// Changed directory structure, port names and drfines.
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| Line 364... |
Line 367... |
//
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//
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// Test operation of control bit RGPIO_CTRL[ECLK]
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// Test operation of control bit RGPIO_CTRL[ECLK]
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//
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//
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task test_eclk;
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task test_eclk;
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integer l1, l2, l3;
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integer l1, l2, l3;
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integer r1, r2;
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integer r1, r2, r3;
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begin
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begin
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// Set external clock to low state
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tb_top.gpio_mon.set_gpioeclk(0);
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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//
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//
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// Phase 1
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// Phase 1
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//
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//
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// GPIO uses WISHBONE clock to latch gpio_in
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// GPIO uses WISHBONE clock to latch gpio_in
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//
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//
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| Line 381... |
Line 389... |
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// Reset GPIO_CTRL
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// Reset GPIO_CTRL
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setctrl(0);
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setctrl(0);
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// Wait for time to advance
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// Wait for time to advance
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#1000;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read GPIO_RGPIO_IN
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// Read GPIO_RGPIO_IN
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getin(l1);
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getin(l1);
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//
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//
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// Phase 2
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// Phase 2
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//
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//
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// GPIO uses external clock to latch gpio_in
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// GPIO uses external clock to latch gpio_in
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//
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//
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// Set GPIO to use external clock
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// Set GPIO to use external clock, NEC bit cleared
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setctrl(1 << `GPIO_RGPIO_CTRL_ECLK);
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setctrl(1 << `GPIO_RGPIO_CTRL_ECLK);
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// Put something else on gpio_in pins
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// Put something else on gpio_in pins
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random_gpio(r2);
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random_gpio(r2);
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tb_top.gpio_mon.set_gpioin(r2);
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tb_top.gpio_mon.set_gpioin(r2);
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// Wait for time to advance
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// Make an external posedge clock pulse
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#1000;
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tb_top.gpio_mon.set_gpioeclk(0);
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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tb_top.gpio_mon.set_gpioeclk(1);
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read GPIO_RGPIO_IN (should be the same as l1)
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// Read RGPIO_IN
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getin(l2);
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getin(l2);
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// Make an external clock
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//
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tb_top.gpio_mon.set_gpioeclk(0);
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// Phase 3
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#10;
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//
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tb_top.gpio_mon.set_gpioeclk(1);
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// Change GPIO inputs and WB clock but not external clock.
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#10;
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// RGPIO_IN should not change.
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//
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// Read RGPIO_IN (should be different than l2)
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// Put something else on gpio_in pins
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random_gpio(r3);
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tb_top.gpio_mon.set_gpioin(r3);
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// Wait for WB clock
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read RGPIO_IN
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getin(l3);
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getin(l3);
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//
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//
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// Phase 3
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// Phase 4
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//
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//
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// Compare phases
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// Compare phases
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//
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//
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if (l1 == l2 && l2 == r1 && l3 == r2)
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if (l1 == r1 && l2 == r2 && l2 == l3)
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$write(".");
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$write(".");
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else
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else
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local_errs = local_errs + 1;
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local_errs = local_errs + 1;
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end
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end
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endtask
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endtask
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| Line 431... |
Line 454... |
//
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//
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// Test operation of control bit RGPIO_CTRL[NEC]
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// Test operation of control bit RGPIO_CTRL[NEC]
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//
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//
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task test_nec;
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task test_nec;
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integer l1, l2;
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integer l1, l2;
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integer r2;
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integer r1, r2;
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begin
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begin
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//
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//
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// Phase 1
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// Phase 1
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//
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//
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// Compare RGPIO_IN before and after negative edge
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// Compare RGPIO_IN before and after negative edge
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//
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//
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// Clear GPIO_RGPIO_IN
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// Set external clock to low state
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tb_top.gpio_mon.set_gpioin('d0);
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tb_top.gpio_mon.set_gpioeclk(0);
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@(posedge tb_top.clk);
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// Set GPIO to use WB clock
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@(posedge tb_top.clk);
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setctrl(0);
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// Advance time
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#1000;
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// Set GPIO to use external clock and set RGPIO_CTRL[NEC]
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// Set GPIO to use external clock and set RGPIO_CTRL[NEC]
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setctrl(1 << `GPIO_RGPIO_CTRL_ECLK | 1 << `GPIO_RGPIO_CTRL_NEC);
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setctrl(1 << `GPIO_RGPIO_CTRL_ECLK | 1 << `GPIO_RGPIO_CTRL_NEC);
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// Put random on gpio inputs
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random_gpio(r1);
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tb_top.gpio_mon.set_gpioin(r1);
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// Advance time by making an external negedge clock pulse
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tb_top.gpio_mon.set_gpioeclk(1);
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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tb_top.gpio_mon.set_gpioeclk(0);
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Put something on gpio_in pins
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// Put something on gpio_in pins
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random_gpio(r2);
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random_gpio(r2);
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tb_top.gpio_mon.set_gpioin(r2);
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tb_top.gpio_mon.set_gpioin(r2);
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// Wait for time to advance
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// Make an external posedge clock pulse
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#1000;
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tb_top.gpio_mon.set_gpioeclk(0);
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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tb_top.gpio_mon.set_gpioeclk(1);
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read RGPIO_IN
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// Read RGPIO_IN (should be the same as r1)
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getin(l1);
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getin(l1);
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// Make an external clock
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// Make an external negedge clock pulse
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tb_top.gpio_mon.set_gpioeclk(1);
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tb_top.gpio_mon.set_gpioeclk(1);
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#10;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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tb_top.gpio_mon.set_gpioeclk(0);
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tb_top.gpio_mon.set_gpioeclk(0);
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#10;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read RGPIO_IN (should be different than l1)
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// Read RGPIO_IN (should be the same as r2)
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getin(l2);
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getin(l2);
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//
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//
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// Phase 2
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// Phase 2
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//
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//
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// Compare phases
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// Compare phases
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//
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//
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if (!l1 && l2 == r2)
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// $display("l1 %h l2 %h r1 %h r2 %h", l1, l2, r1, r2);
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if (l1 == r1 && l2 == r2)
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$write(".");
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$write(".");
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else
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else
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local_errs = local_errs + 1;
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local_errs = local_errs + 1;
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end
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end
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endtask
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endtask
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| Line 507... |
Line 546... |
// Put something on gpio_in pins
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// Put something on gpio_in pins
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random_gpio(l1);
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random_gpio(l1);
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tb_top.gpio_mon.set_gpioin(l1);
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tb_top.gpio_mon.set_gpioin(l1);
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// Advance time
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// Advance time
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#1000;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read GPIO_RGPIO_IN
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// Read GPIO_RGPIO_IN
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getin(l2);
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getin(l2);
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// Compare gpio_in and RGPIO_IN. Should be equal.
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// Compare gpio_in and RGPIO_IN. Should be equal.
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| Line 541... |
Line 581... |
// Put something in RGPIO_OUT pins
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// Put something in RGPIO_OUT pins
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l1 = $random;
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l1 = $random;
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setout(l1);
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setout(l1);
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// Advance time
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// Advance time
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#1000;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read gpio_out
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// Read gpio_out
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tb_top.gpio_mon.get_gpioout(l2);
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tb_top.gpio_mon.get_gpioout(l2);
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// Compare gpio_out and RGPIO_OUT. Should be equal.
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// Compare gpio_out and RGPIO_OUT. Should be equal.
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| Line 575... |
Line 616... |
// Put something in RGPIO_OE pins
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// Put something in RGPIO_OE pins
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l1 = $random;
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l1 = $random;
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setoe(l1);
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setoe(l1);
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// Advance time
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// Advance time
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#1000;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read gpio_oen
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// Read gpio_oen
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tb_top.gpio_mon.get_gpiooen(l2);
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tb_top.gpio_mon.get_gpiooen(l2);
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// Compare gpio_oen and RGPIO_OE. Should be exactly opposite.
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// Compare gpio_oen and RGPIO_OE. Should be exactly opposite.
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| Line 617... |
Line 659... |
// Put something in RGPIO_OUT pins
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// Put something in RGPIO_OUT pins
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l3 = $random;
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l3 = $random;
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setout(l3);
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setout(l3);
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// Advance time
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// Advance time
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#1000;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Read gpio_out
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// Read gpio_out
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tb_top.gpio_mon.get_gpioout(l4);
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tb_top.gpio_mon.get_gpioout(l4);
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// Compare gpio_out, RGPIO_OUT, RGPIO_AUX and gpio_aux.
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// Compare gpio_out, RGPIO_OUT, RGPIO_AUX and gpio_aux.
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| Line 650... |
Line 693... |
integer l1, l2, l3;
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integer l1, l2, l3;
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integer i, rnd, err;
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integer i, rnd, err;
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integer r1;
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integer r1;
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begin
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begin
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$write(" Testing control bis RGPIO_CTRL[INTE] and RGPIO_CTRL[INT] ...");
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$write(" Testing control bit RGPIO_CTRL[INTE] and RGPIO_CTRL[INT] ...");
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//
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//
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// Phase 1
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// Phase 1
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//
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//
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// Generate patterns on inputs in interrupt mode
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// Generate patterns on inputs in interrupt mode
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| Line 678... |
Line 721... |
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// Enable interrupts in RGPIO_INTE
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// Enable interrupts in RGPIO_INTE
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setinte(r1);
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setinte(r1);
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// Advance time
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// Advance time
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#100;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Sample interrupt request. Should be zero.
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// Sample interrupt request. Should be zero.
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l1 = tb_top.gpio_top.wb_inta_o;
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l1 = tb_top.gpio_top.wb_inta_o;
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// Clear gpio_in pins
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// Clear gpio_in pins
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tb_top.gpio_mon.set_gpioin(0);
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tb_top.gpio_mon.set_gpioin(0);
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// Advance time
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// Advance time
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#100;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Sample interrupt request. Should be one.
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// Sample interrupt request. Should be one.
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l2 = tb_top.gpio_top.wb_inta_o;
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l2 = tb_top.gpio_top.wb_inta_o;
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// Clear interrupt request
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// Clear interrupt request
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setctrl(0);
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setctrl(0);
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// Advance time
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// Advance time
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#100;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Sample interrupt request. Should be zero.
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// Sample interrupt request. Should be zero.
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l3 = tb_top.gpio_top.wb_inta_o;
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l3 = tb_top.gpio_top.wb_inta_o;
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// Check for errors
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// Check for errors
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| Line 758... |
Line 804... |
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// Enable interrupts in RGPIO_INTE
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// Enable interrupts in RGPIO_INTE
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setinte(r1);
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setinte(r1);
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// Advance time
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// Advance time
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#100;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Sample interrupt request. Should be zero.
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// Sample interrupt request. Should be zero.
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l1 = tb_top.gpio_top.wb_inta_o;
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l1 = tb_top.gpio_top.wb_inta_o;
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// Clear gpio_in pins
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// Clear gpio_in pins
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tb_top.gpio_mon.set_gpioin('hffffffff);
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tb_top.gpio_mon.set_gpioin('hffffffff);
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// Advance time
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// Advance time
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#100;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Sample interrupt request. Should be one.
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// Sample interrupt request. Should be one.
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l2 = tb_top.gpio_top.wb_inta_o;
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l2 = tb_top.gpio_top.wb_inta_o;
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// Clear interrupt request
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// Clear interrupt request
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setctrl(0);
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setctrl(0);
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// Advance time
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// Advance time
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#100;
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@(posedge tb_top.clk);
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@(posedge tb_top.clk);
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// Sample interrupt request. Should be zero.
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// Sample interrupt request. Should be zero.
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l3 = tb_top.gpio_top.wb_inta_o;
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l3 = tb_top.gpio_top.wb_inta_o;
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// Check for errors
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// Check for errors
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