OpenCores
URL https://opencores.org/ocsvn/gpio/gpio/trunk

Subversion Repositories gpio

[/] [gpio/] [trunk/] [bench/] [verilog/] [tb_tasks.v] - Diff between revs 41 and 47

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Rev 41 Rev 47
Line 42... Line 42... 
//////////////////////////////////////////////////////////////////////
 
//////////////////////////////////////////////////////////////////////
 
//
 
//
 
// CVS Revision History
 
// CVS Revision History
 
//
 
//
 
// $Log: not supported by cvs2svn $
 
// $Log: not supported by cvs2svn $
 
 
 
// Revision 1.8  2003/11/19 14:22:43  gorand
 
 
 
// small changes, to satisfy VATS..
 
 
 
//
 
// Revision 1.7  2003/11/10 23:23:57  gorand
 
// Revision 1.7  2003/11/10 23:23:57  gorand
 
// tests passed.
 
// tests passed.
 
//
 
//
 
// Revision 1.6  2001/12/25 17:21:06  lampret
 
// Revision 1.6  2001/12/25 17:21:06  lampret
 
// Fixed two typos.
 
// Fixed two typos.
Line 103... Line 106... 
input   [31:0] val;
 
input   [31:0] val;
 
 
 
 
 
reg  [ 31:0 ] addr ;
 
reg  [ 31:0 ] addr ;
 
begin
 
begin
 
  addr = `GPIO_RGPIO_OUT <<sh_addr ;
 
  addr = `GPIO_RGPIO_OUT <<sh_addr ;
 
        #100 tb_top.wb_master.wr(`GPIO_RGPIO_OUT<<sh_addr, val, 4'b1111);
 
        #100 gpio_testbench.wb_master.wr(`GPIO_RGPIO_OUT<<sh_addr, val, 4'b1111);
 
/*  $display ( " addr : %h %h", addr, val ) ;
 
/*  $display ( " addr : %h %h", addr, val ) ;
 
  $display ( "             out_pad : %h ", tb_top.gpio_top.out_pad ) ;
 
  $display ( "             out_pad : %h ", gpio_testbench.gpio_top.out_pad ) ;
 
  $display ( "           rgpio_aux : %h ", tb_top.gpio_top.rgpio_aux) ;
 
  $display ( "           rgpio_aux : %h ", gpio_testbench.gpio_top.rgpio_aux) ;
 
  $display ( "               aux_i : %h ", tb_top.gpio_top.aux_i ) ;
 
  $display ( "               aux_i : %h ", gpio_testbench.gpio_top.aux_i ) ;
 
  $display ( "           rgpio_out : %h ", tb_top.gpio_top.rgpio_out ) ;
 
  $display ( "           rgpio_out : %h ", gpio_testbench.gpio_top.rgpio_out ) ;
 
*/
 
*/
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 121... Line 124... 
//
 
//
 
task setoe;
 
task setoe;
 
input   [31:0] val;
 
input   [31:0] val;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.wr(`GPIO_RGPIO_OE<<sh_addr, val, 4'b1111);
 
        #100 gpio_testbench.wb_master.wr(`GPIO_RGPIO_OE<<sh_addr, val, 4'b1111);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 133... Line 136... 
//
 
//
 
task setinte;
 
task setinte;
 
input   [31:0] val;
 
input   [31:0] val;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.wr(`GPIO_RGPIO_INTE<<sh_addr, val, 4'b1111);
 
        #100 gpio_testbench.wb_master.wr(`GPIO_RGPIO_INTE<<sh_addr, val, 4'b1111);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 145... Line 148... 
//
 
//
 
task setptrig;
 
task setptrig;
 
input   [31:0] val;
 
input   [31:0] val;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.wr(`GPIO_RGPIO_PTRIG<<sh_addr, val, 4'b1111);
 
        #100 gpio_testbench.wb_master.wr(`GPIO_RGPIO_PTRIG<<sh_addr, val, 4'b1111);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 157... Line 160... 
//
 
//
 
task setaux;
 
task setaux;
 
input   [31:0] val;
 
input   [31:0] val;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.wr(`GPIO_RGPIO_AUX<<sh_addr, val, 4'b1111);
 
        #100 gpio_testbench.wb_master.wr(`GPIO_RGPIO_AUX<<sh_addr, val, 4'b1111);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 169... Line 172... 
//
 
//
 
task setctrl;
 
task setctrl;
 
input   [31:0] val;
 
input   [31:0] val;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.wr(`GPIO_RGPIO_CTRL<<sh_addr, val, 4'b1111);
 
        #100 gpio_testbench.wb_master.wr(`GPIO_RGPIO_CTRL<<sh_addr, val, 4'b1111);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 181... Line 184... 
//
 
//
 
task setints;
 
task setints;
 
input   [31:0] val;
 
input   [31:0] val;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.wr(`GPIO_RGPIO_INTS<<sh_addr, val, 4'b1111);
 
        #100 gpio_testbench.wb_master.wr(`GPIO_RGPIO_INTS<<sh_addr, val, 4'b1111);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 193... Line 196... 
//
 
//
 
task showin;
 
task showin;
 
 
 
 
 
reg     [31:0] tmp;
 
reg     [31:0] tmp;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_IN<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_IN<<sh_addr, tmp);
 
        $write(" RGPIO_IN: %h", tmp);
 
        $write(" RGPIO_IN: %h", tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 206... Line 209... 
//
 
//
 
task showout;
 
task showout;
 
 
 
 
 
reg     [31:0] tmp;
 
reg     [31:0] tmp;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_OUT<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_OUT<<sh_addr, tmp);
 
        $write(" RGPIO_OUT: %h", tmp);
 
        $write(" RGPIO_OUT: %h", tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 220... Line 223... 
//
 
//
 
task showoe;
 
task showoe;
 
 
 
 
 
reg     [31:0] tmp;
 
reg     [31:0] tmp;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_OE<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_OE<<sh_addr, tmp);
 
        $write(" RGPIO_OE:%h", tmp);
 
        $write(" RGPIO_OE:%h", tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 233... Line 236... 
//
 
//
 
task showinte;
 
task showinte;
 
 
 
 
 
reg     [31:0] tmp;
 
reg     [31:0] tmp;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_INTE<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_INTE<<sh_addr, tmp);
 
        $write(" RGPIO_INTE:%h", tmp);
 
        $write(" RGPIO_INTE:%h", tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 246... Line 249... 
//
 
//
 
task showptrig;
 
task showptrig;
 
 
 
 
 
reg     [31:0] tmp;
 
reg     [31:0] tmp;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_PTRIG<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_PTRIG<<sh_addr, tmp);
 
        $write(" RGPIO_PTRIG:%h", tmp);
 
        $write(" RGPIO_PTRIG:%h", tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 259... Line 262... 
//
 
//
 
task showaux;
 
task showaux;
 
 
 
 
 
reg     [31:0] tmp;
 
reg     [31:0] tmp;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_AUX<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_AUX<<sh_addr, tmp);
 
        $write(" RGPIO_AUX:%h", tmp);
 
        $write(" RGPIO_AUX:%h", tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 272... Line 275... 
//
 
//
 
task showctrl;
 
task showctrl;
 
 
 
 
 
reg     [31:0] tmp;
 
reg     [31:0] tmp;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_CTRL<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_CTRL<<sh_addr, tmp);
 
        $write(" RGPIO_CTRL: %h", tmp);
 
        $write(" RGPIO_CTRL: %h", tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 285... Line 288... 
//
 
//
 
task showints;
 
task showints;
 
 
 
 
 
reg     [31:0] tmp;
 
reg     [31:0] tmp;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_INTS<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_INTS<<sh_addr, tmp);
 
        $write(" RGPIO_INTS:%h", tmp);
 
        $write(" RGPIO_INTS:%h", tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
Line 301... Line 304... 
output          ret;
 
output          ret;
 
 
 
 
 
reg     [31:0]   tmp;
 
reg     [31:0]   tmp;
 
reg             ret;
 
reg             ret;
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_IN<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_IN<<sh_addr, tmp);
 
 
 
 
 
        if (tmp == val)
 
        if (tmp == val)
 
                ret = 1;
 
                ret = 1;
 
        else
 
        else
 
                ret = 0;
 
                ret = 0;
Line 318... Line 321... 
//
 
//
 
task getin;
 
task getin;
 
output  [31:0]   tmp;
 
output  [31:0]   tmp;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_IN<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_IN<<sh_addr, tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 330... Line 333... 
//
 
//
 
task getout;
 
task getout;
 
output  [31:0]   tmp;
 
output  [31:0]   tmp;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_OUT<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_OUT<<sh_addr, tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 342... Line 345... 
//
 
//
 
task getoe;
 
task getoe;
 
output  [31:0]   tmp;
 
output  [31:0]   tmp;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_OE<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_OE<<sh_addr, tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 354... Line 357... 
//
 
//
 
task getinte;
 
task getinte;
 
output  [31:0]   tmp;
 
output  [31:0]   tmp;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_INTE<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_INTE<<sh_addr, tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 366... Line 369... 
//
 
//
 
task getptrig;
 
task getptrig;
 
output  [31:0]   tmp;
 
output  [31:0]   tmp;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_PTRIG<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_PTRIG<<sh_addr, tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 378... Line 381... 
//
 
//
 
task getaux;
 
task getaux;
 
output  [31:0]   tmp;
 
output  [31:0]   tmp;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_AUX<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_AUX<<sh_addr, tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 390... Line 393... 
//
 
//
 
task getctrl;
 
task getctrl;
 
output  [31:0]   tmp;
 
output  [31:0]   tmp;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_CTRL<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_CTRL<<sh_addr, tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 402... Line 405... 
//
 
//
 
task getints;
 
task getints;
 
output  [31:0]   tmp;
 
output  [31:0]   tmp;
 
 
 
 
 
begin
 
begin
 
        #100 tb_top.wb_master.rd(`GPIO_RGPIO_INTS<<sh_addr, tmp);
 
        #100 gpio_testbench.wb_master.rd(`GPIO_RGPIO_INTS<<sh_addr, tmp);
 
end
 
end
 
 
 
 
 
endtask
 
endtask
 
 
 
 
 
//
 
//
Line 428... Line 431... 
reg [gw-1:0 ]            l1, l2, l3;
 
reg [gw-1:0 ]            l1, l2, l3;
 
reg [gw-1:0 ]            r1, r2, r3;
 
reg [gw-1:0 ]            r1, r2, r3;
 
begin
 
begin
 
 
 
 
 
        // Set external clock to low state
 
        // Set external clock to low state
 
        tb_top.gpio_mon.set_gpioeclk(0);
 
        gpio_testbench.gpio_mon.set_gpioeclk(0);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
 
 
 
 
        //
 
        //
 
        // Phase 1
 
        // Phase 1
 
        //
 
        //
 
        // GPIO uses WISHBONE clock to latch gpio_in
 
        // GPIO uses WISHBONE clock to latch gpio_in
 
        //
 
        //
 
 
 
 
 
        // Put something on gpio_in pins
 
        // Put something on gpio_in pins
 
        random_gpio(r1);
 
        random_gpio(r1);
 
        tb_top.gpio_mon.set_gpioin(r1);
 
        gpio_testbench.gpio_mon.set_gpioin(r1);
 
 
 
 
 
        // Reset GPIO_CTRL
 
        // Reset GPIO_CTRL
 
        setctrl(0);
 
        setctrl(0);
 
 
 
 
 
        // Wait for time to advance
 
        // Wait for time to advance
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
 
 
 
 
        // Read GPIO_RGPIO_IN
 
        // Read GPIO_RGPIO_IN
 
        getin(l1);
 
        getin(l1);
 
 
 
 
 
        //
 
        //
Line 463... Line 466... 
        // Set GPIO to use external clock, NEC bit cleared
 
        // Set GPIO to use external clock, NEC bit cleared
 
        setctrl(1 << `GPIO_RGPIO_CTRL_ECLK);
 
        setctrl(1 << `GPIO_RGPIO_CTRL_ECLK);
 
 
 
 
 
        // Put something else on gpio_in pins
 
        // Put something else on gpio_in pins
 
        random_gpio(r2);
 
        random_gpio(r2);
 
        tb_top.gpio_mon.set_gpioin(r2);
 
        gpio_testbench.gpio_mon.set_gpioin(r2);
 
 
 
 
 
        // Make an external posedge clock pulse
 
        // Make an external posedge clock pulse
 
        tb_top.gpio_mon.set_gpioeclk(0);
 
        gpio_testbench.gpio_mon.set_gpioeclk(0);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        tb_top.gpio_mon.set_gpioeclk(1);
 
        gpio_testbench.gpio_mon.set_gpioeclk(1);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
 
 
 
 
        // Read RGPIO_IN
 
        // Read RGPIO_IN
 
        getin(l2);
 
        getin(l2);
 
 
 
 
 
        //
 
        //
Line 485... Line 488... 
        // RGPIO_IN should not change.
 
        // RGPIO_IN should not change.
 
        //
 
        //
 
 
 
 
 
        // Put something else on gpio_in pins
 
        // Put something else on gpio_in pins
 
        random_gpio(r3);
 
        random_gpio(r3);
 
        tb_top.gpio_mon.set_gpioin(r3);
 
        gpio_testbench.gpio_mon.set_gpioin(r3);
 
 
 
 
 
        // Wait for WB clock
 
        // Wait for WB clock
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
 
 
 
 
        // Read RGPIO_IN
 
        // Read RGPIO_IN
 
        getin(l3);
 
        getin(l3);
 
 
 
 
 
        //
 
        //
Line 520... Line 523... 
        //
 
        //
 
        // Compare RGPIO_IN before and after negative edge
 
        // Compare RGPIO_IN before and after negative edge
 
        //
 
        //
 
 
 
 
 
        // Set external clock to low state
 
        // Set external clock to low state
 
        tb_top.gpio_mon.set_gpioeclk(0);
 
        gpio_testbench.gpio_mon.set_gpioeclk(0);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
 
 
 
 
        // Set GPIO to use external clock and set RGPIO_CTRL[NEC]
 
        // Set GPIO to use external clock and set RGPIO_CTRL[NEC]
 
        setctrl(1 << `GPIO_RGPIO_CTRL_ECLK | 1 << `GPIO_RGPIO_CTRL_NEC);
 
        setctrl(1 << `GPIO_RGPIO_CTRL_ECLK | 1 << `GPIO_RGPIO_CTRL_NEC);
 
 
 
 
 
        // Put random on gpio inputs
 
        // Put random on gpio inputs
 
        random_gpio(r1);
 
        random_gpio(r1);
 
        tb_top.gpio_mon.set_gpioin(r1);
 
        gpio_testbench.gpio_mon.set_gpioin(r1);
 
 
 
 
 
        // Advance time by making an external negedge clock pulse
 
        // Advance time by making an external negedge clock pulse
 
        tb_top.gpio_mon.set_gpioeclk(1);
 
        gpio_testbench.gpio_mon.set_gpioeclk(1);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        tb_top.gpio_mon.set_gpioeclk(0);
 
        gpio_testbench.gpio_mon.set_gpioeclk(0);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
 
 
 
 
        // Put something on gpio_in pins
 
        // Put something on gpio_in pins
 
        random_gpio(r2);
 
        random_gpio(r2);
 
        tb_top.gpio_mon.set_gpioin(r2);
 
        gpio_testbench.gpio_mon.set_gpioin(r2);
 
 
 
 
 
        // Make an external posedge clock pulse
 
        // Make an external posedge clock pulse
 
        tb_top.gpio_mon.set_gpioeclk(0);
 
        gpio_testbench.gpio_mon.set_gpioeclk(0);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        tb_top.gpio_mon.set_gpioeclk(1);
 
        gpio_testbench.gpio_mon.set_gpioeclk(1);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
 
 
 
 
        // Read RGPIO_IN (should be the same as r1)
 
        // Read RGPIO_IN (should be the same as r1)
 
        getin(l1);
 
        getin(l1);
 
 
 
 
 
        // Make an external negedge clock pulse
 
        // Make an external negedge clock pulse
 
        tb_top.gpio_mon.set_gpioeclk(1);
 
        gpio_testbench.gpio_mon.set_gpioeclk(1);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        tb_top.gpio_mon.set_gpioeclk(0);
 
        gpio_testbench.gpio_mon.set_gpioeclk(0);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
        @(posedge tb_top.clk);
 
        @(posedge gpio_testbench.clk);
 
 
 
 
 
        // Read RGPIO_IN (should be the same as r2)
 
        // Read RGPIO_IN (should be the same as r2)
 
        getin(l2);
 
        getin(l2);
 
 
 
 
 
        //
 
        //
Line 600... Line 603... 
 
 
 
 
        err = 0;
 
        err = 0;
 
        for (i = 0; i < 10 * `GPIO_VERIF_INTENSITY; i = i +1) begin
 
        for (i = 0; i < 10 * `GPIO_VERIF_INTENSITY; i = i +1) begin
 
                // Put something on gpio_in pins
 
                // Put something on gpio_in pins
 
                random_gpio(l1);
 
                random_gpio(l1);
 
                tb_top.gpio_mon.set_gpioin(l1);
 
                gpio_testbench.gpio_mon.set_gpioin(l1);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Read GPIO_RGPIO_IN
 
                // Read GPIO_RGPIO_IN
 
                getin(l2);
 
                getin(l2);
 
 
 
 
 
                // Compare gpio_in and RGPIO_IN. Should be equal.
 
                // Compare gpio_in and RGPIO_IN. Should be equal.
Line 638... Line 641... 
                // Put something in RGPIO_OUT pins
 
                // Put something in RGPIO_OUT pins
 
                l1 = $random;
 
                l1 = $random;
 
                setout(l1);
 
                setout(l1);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Read gpio_out
 
                // Read gpio_out
 
                tb_top.gpio_mon.get_gpioout(l2);
 
                gpio_testbench.gpio_mon.get_gpioout(l2);
 
 
 
 
 
                // Compare gpio_out and RGPIO_OUT. Should be equal.
 
                // Compare gpio_out and RGPIO_OUT. Should be equal.
 
                if (l1 != l2)
 
                if (l1 != l2)
 
                        err = err + 1;
 
                        err = err + 1;
 
        end
 
        end
Line 673... Line 676... 
                // Put something in RGPIO_OE pins
 
                // Put something in RGPIO_OE pins
 
                l1 = $random;
 
                l1 = $random;
 
                setoe(l1);
 
                setoe(l1);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Read gpio_oen
 
                // Read gpio_oen
 
                tb_top.gpio_mon.get_gpiooen(l2);
 
                gpio_testbench.gpio_mon.get_gpiooen(l2);
 
 
 
 
 
                // Compare gpio_oen and RGPIO_OE. Should be exactly opposite.
 
                // Compare gpio_oen and RGPIO_OE. Should be exactly opposite.
 
                if (l1 != ~l2)
 
                if (l1 != ~l2)
 
                        err = err + 1;
 
                        err = err + 1;
 
        end
 
        end
Line 705... Line 708... 
 
 
 
 
        err = 0;
 
        err = 0;
 
        for (i = 0; i < 10 * `GPIO_VERIF_INTENSITY; i = i +1) begin
 
        for (i = 0; i < 10 * `GPIO_VERIF_INTENSITY; i = i +1) begin
 
                // Put something on gpio_aux pins
 
                // Put something on gpio_aux pins
 
                l1 = $random;
 
                l1 = $random;
 
                tb_top.gpio_mon.set_gpioaux(l1);
 
                gpio_testbench.gpio_mon.set_gpioaux(l1);
 
 
 
 
 
                // Put something in RGPIO_AUX pins
 
                // Put something in RGPIO_AUX pins
 
                l2 = $random;
 
                l2 = $random;
 
                setaux(l2);
 
                setaux(l2);
 
 
 
 
 
                // Put something in RGPIO_OUT pins
 
                // Put something in RGPIO_OUT pins
 
                l3 = $random;
 
                l3 = $random;
 
                setout(l3);
 
                setout(l3);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Read gpio_out
 
                // Read gpio_out
 
                tb_top.gpio_mon.get_gpioout(l4);
 
                gpio_testbench.gpio_mon.get_gpioout(l4);
 
 
 
 
 
                // Compare gpio_out, RGPIO_OUT, RGPIO_AUX and gpio_aux.
 
                // Compare gpio_out, RGPIO_OUT, RGPIO_AUX and gpio_aux.
 
                // RGPIO_AUX specifies which gpio_aux bits and RGPIO_OUT 
                // RGPIO_AUX specifies which gpio_aux bits and RGPIO_OUT 
                // bits are present on gpio_out and where
 
                // bits are present on gpio_out and where
 
                if ((l1 & l2 | l3 & ~l2) != l4)
 
                if ((l1 & l2 | l3 & ~l2) != l4)
Line 766... Line 769... 
        err = 0;
 
        err = 0;
 
        for( i = 0; i < 10 * `GPIO_VERIF_INTENSITY; i = i + 1) begin
 
        for( i = 0; i < 10 * `GPIO_VERIF_INTENSITY; i = i + 1) begin
 
 
 
 
 
                // Set gpio_in pins
 
                // Set gpio_in pins
 
                r1 = ((1<<`GPIO_IOS)-1) & 'hffffffff;
 
                r1 = ((1<<`GPIO_IOS)-1) & 'hffffffff;
 
                tb_top.gpio_mon.set_gpioin(r1);
 
                gpio_testbench.gpio_mon.set_gpioin(r1);
 
 
 
 
 
                // Low level triggering
 
                // Low level triggering
 
                setptrig(0);
 
                setptrig(0);
 
 
 
 
 
                // Clear RGPIO_INTS
 
                // Clear RGPIO_INTS
Line 781... Line 784... 
 
 
 
 
                // Enable interrupts in RGPIO_INTE
 
                // Enable interrupts in RGPIO_INTE
 
                setinte(r1);
 
                setinte(r1);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Sample interrupt request. Should be zero.
 
                // Sample interrupt request. Should be zero.
 
                l1 = tb_top.gpio_top.wb_inta_o;
 
                l1 = gpio_testbench.gpio_top.wb_inta_o;
 
 
 
 
 
                // Clear gpio_in pins
 
                // Clear gpio_in pins
 
                tb_top.gpio_mon.set_gpioin(0);
 
                gpio_testbench.gpio_mon.set_gpioin(0);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Sample interrupt request. Should be one.
 
                // Sample interrupt request. Should be one.
 
                l2 = tb_top.gpio_top.wb_inta_o;
 
                l2 = gpio_testbench.gpio_top.wb_inta_o;
 
 
 
 
 
                // Clear interrupt request
 
                // Clear interrupt request
 
                setctrl(0);
 
                setctrl(0);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Sample interrupt request. Should be zero.
 
                // Sample interrupt request. Should be zero.
 
                l3 = tb_top.gpio_top.wb_inta_o;
 
                l3 = gpio_testbench.gpio_top.wb_inta_o;
 
 
 
 
 
                // Get RGPIO_INTS. Should be nonzero.
 
                // Get RGPIO_INTS. Should be nonzero.
 
                getints(l4);
 
                getints(l4);
 
 
 
 
 
                // Check for errors
 
                // Check for errors
Line 857... Line 860... 
 
 
 
 
                // Set bits to one
 
                // Set bits to one
 
                r1 = ((1<<`GPIO_IOS)-1) & 'hffffffff;
 
                r1 = ((1<<`GPIO_IOS)-1) & 'hffffffff;
 
 
 
 
 
                // Set gpio_in pins
 
                // Set gpio_in pins
 
                tb_top.gpio_mon.set_gpioin('h00000000);
 
                gpio_testbench.gpio_mon.set_gpioin('h00000000);
 
 
 
 
 
                // Clear old interrupts
 
                // Clear old interrupts
 
                setints(0);
 
                setints(0);
 
 
 
 
 
                // High level triggering
 
                // High level triggering
Line 872... Line 875... 
 
 
 
 
                // Enable interrupts in RGPIO_INTE
 
                // Enable interrupts in RGPIO_INTE
 
                setinte(r1);
 
                setinte(r1);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Sample interrupt request. Should be zero.
 
                // Sample interrupt request. Should be zero.
 
                l1 = tb_top.gpio_top.wb_inta_o;
 
                l1 = gpio_testbench.gpio_top.wb_inta_o;
 
 
 
 
 
                // Clear gpio_in pins
 
                // Clear gpio_in pins
 
                tb_top.gpio_mon.set_gpioin('hffffffff);
 
                gpio_testbench.gpio_mon.set_gpioin('hffffffff);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Sample interrupt request. Should be one.
 
                // Sample interrupt request. Should be one.
 
                l2 = tb_top.gpio_top.wb_inta_o;
 
                l2 = gpio_testbench.gpio_top.wb_inta_o;
 
 
 
 
 
                // Clear interrupt request
 
                // Clear interrupt request
 
                setctrl(0);
 
                setctrl(0);
 
                setints(0);
 
                setints(0);
 
 
 
 
 
                // Advance time
 
                // Advance time
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
                @(posedge tb_top.clk);
 
                @(posedge gpio_testbench.clk);
 
 
 
 
 
                // Sample interrupt request. Should be zero.
 
                // Sample interrupt request. Should be zero.
 
                l3 = tb_top.gpio_top.wb_inta_o;
 
                l3 = gpio_testbench.gpio_top.wb_inta_o;
 
 
 
 
 
                // Check for errors
 
                // Check for errors
 
                if (l1 || !l2 || l3)
 
                if (l1 || !l2 || l3)
 
                        err = err +1;
 
                        err = err +1;
 
        end
 
        end
Line 922... Line 925... 
endtask
 
endtask
 
 
 
 
 
//
 
//
 
// Do continues check for interrupts
 
// Do continues check for interrupts
 
//
 
//
 
always @(posedge tb_top.gpio_top.wb_inta_o)
 
always @(posedge gpio_testbench.gpio_top.wb_inta_o)
 
        if (ints_disabled) begin
 
        if (ints_disabled) begin
 
                $display("Spurious interrupt detected. ");
 
                $display("Spurious interrupt detected. ");
 
                failed;
 
                failed;
 
                ints_working = 9876;
 
                ints_working = 9876;
 
                $display;
 
                $display;
Line 936... Line 939... 
// Start of testbench test tasks
 
// Start of testbench test tasks
 
//
 
//
 
integer         i;
 
integer         i;
 
initial begin
 
initial begin
 
`ifdef GPIO_DUMP_VCD
 
`ifdef GPIO_DUMP_VCD
 
        $dumpfile("../out/tb_top.vcd");
 
        $dumpfile("../out/gpio_testbench.vcd");
 
        $dumpvars(0);
 
        $dumpvars(0);
 
`endif
 
`endif
 
        nr_failed = 0;
 
        nr_failed = 0;
 
        ints_disabled = 1;
 
        ints_disabled = 1;
 
        ints_working = 0;
 
        ints_working = 0;
 
        tb_top.gpio_mon.set_gpioin(0);
 
        gpio_testbench.gpio_mon.set_gpioin(0);
 
        tb_top.gpio_mon.set_gpioaux(0);
 
        gpio_testbench.gpio_mon.set_gpioaux(0);
 
        tb_top.gpio_mon.set_gpioeclk(0);
 
        gpio_testbench.gpio_mon.set_gpioeclk(0);
 
        $display;
 
        $display;
 
        $display("###");
 
        $display("###");
 
        $display("### GPIO IP Core Verification ###");
 
        $display("### GPIO IP Core Verification ###");
 
        $display("###");
 
        $display("###");
 
        $display;
 
        $display;

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