| Line 42... |
Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.1 2001/09/18 18:49:07 lampret
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// Changed top level ptc into gpio_top. Changed defines.v into gpio_defines.v.
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//
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// Revision 1.1 2001/08/21 21:39:28 lampret
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// Revision 1.1 2001/08/21 21:39:28 lampret
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// Changed directory structure, port names and drfines.
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// Changed directory structure, port names and drfines.
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//
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//
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// Revision 1.3 2001/07/15 00:21:10 lampret
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// Revision 1.3 2001/07/15 00:21:10 lampret
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// Registers can be omitted and will have certain default values
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// Registers can be omitted and will have certain default values
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| Line 78... |
Line 81... |
// Defined by default (duhh !).
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// Defined by default (duhh !).
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//
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//
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`define GPIO_IMPLEMENTED
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`define GPIO_IMPLEMENTED
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//
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//
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// Define to register all WISHBONE outputs.
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//
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// Register outputs if you are using GPIO core as a block and synthesizing
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// and place&routing it separately from the rest of the system.
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//
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// If you do not need registered outputs, you can save some area by not defining
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// this macro. By default it is defined.
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//
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`define GPIO_REGISTERED_WB_OUTPUTS
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//
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// Define to register all GPIO pad outputs.
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//
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// Register outputs if you are using GPIO core as a block and synthesizing
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// and place&routing it separately from the rest of the system.
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//
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// If you do not need registered outputs, you can save some area by not defining
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// this macro. By default it is defined.
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//
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`define GPIO_REGISTERED_IO_OUTPUTS
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//
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// Define to avoid using negative edge clock flip-flops for external clock
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// (caused by RGPIO_CTRL[NEC] bit. Instead an inverted external clock with
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// positive edge clock flip-flops will be used.
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//
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// By default it is defined.
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//
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`define GPIO_NO_NEGEDGE_FLOPS
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//
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// Undefine if you don't need to read GPIO registers except for RGPIO_IN register.
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// Undefine if you don't need to read GPIO registers except for RGPIO_IN register.
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// When it is undefined all reads of GPIO registers return RGPIO_IN register. This
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// When it is undefined all reads of GPIO registers return RGPIO_IN register. This
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// is usually useful if you want really small area (for example when implemented in
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// is usually useful if you want really small area (for example when implemented in
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// FPGA).
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// FPGA).
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//
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//
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| Line 112... |
Line 146... |
`define GPIO_STRICT_32BIT_ACCESS
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`define GPIO_STRICT_32BIT_ACCESS
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//
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//
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// WISHBONE address bits used for full decoding of GPIO registers.
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// WISHBONE address bits used for full decoding of GPIO registers.
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//
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//
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`define GPIO_ADDRHH 15
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`define GPIO_ADDRHH 6
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`define GPIO_ADDRHL 5
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`define GPIO_ADDRHL 5
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`define GPIO_ADDRLH 1
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`define GPIO_ADDRLH 1
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`define GPIO_ADDRLL 0
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`define GPIO_ADDRLL 0
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//
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//
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