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[/] [gpio/] [trunk/] [rtl/] [verilog/] [gpio_defines.v] - Diff between revs 27 and 29

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Rev 27 Rev 29
Line 42... Line 42...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.4  2002/05/06 18:25:31  lampret
 
// negedge flops are enabled by default.
 
//
// Revision 1.3  2001/12/25 17:12:35  lampret
// Revision 1.3  2001/12/25 17:12:35  lampret
// Added RGPIO_INTS.
// Added RGPIO_INTS.
//
//
// Revision 1.2  2001/11/15 02:24:37  lampret
// Revision 1.2  2001/11/15 02:24:37  lampret
// Added GPIO_REGISTERED_WB_OUTPUTS, GPIO_REGISTERED_IO_OUTPUTS and GPIO_NO_NEGEDGE_FLOPS.
// Added GPIO_REGISTERED_WB_OUTPUTS, GPIO_REGISTERED_IO_OUTPUTS and GPIO_NO_NEGEDGE_FLOPS.
Line 118... Line 121...
// By default it is not defined.
// By default it is not defined.
//
//
//`define GPIO_NO_NEGEDGE_FLOPS
//`define GPIO_NO_NEGEDGE_FLOPS
 
 
// 
// 
 
// If GPIO_NO_NEGEDGE_FLOPS is defined, a mux needs to be placed on external clock
 
// clk_pad_i to implement RGPIO_CTRL[NEC] functionality. If no mux is allowed on
 
// clock signal, enable the following define.
 
//
 
// By default it is not defined.
 
//
 
//`define GPIO_NO_CLKPAD_LOGIC
 
 
 
// 
// Undefine if you don't need to read GPIO registers except for RGPIO_IN register.
// Undefine if you don't need to read GPIO registers except for RGPIO_IN register.
// When it is undefined all reads of GPIO registers return RGPIO_IN register. This
// When it is undefined all reads of GPIO registers return RGPIO_IN register. This
// is usually useful if you want really small area (for example when implemented in
// is usually useful if you want really small area (for example when implemented in
// FPGA).
// FPGA).
//
//

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