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Line 42... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.2 2003/10/02 18:54:35 simons
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// GPIO signals muxed with other peripherals, higland_board fixed.
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//
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// Revision 1.1.1.1 2003/06/24 09:09:23 simons
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// This files were moved here from toplevel folder.
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//
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// Revision 1.1.1.1 2003/06/11 18:51:13 simons
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// Initial import.
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//
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// Revision 1.5 2002/11/11 21:36:28 lampret
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// Added ifdef to remove mux from clk_pad_i if mux is not allowed. This also removes RGPIO_CTRL[NEC].
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//
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// Revision 1.4 2002/05/06 18:25:31 lampret
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// Revision 1.4 2002/05/06 18:25:31 lampret
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// negedge flops are enabled by default.
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// negedge flops are enabled by default.
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//
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//
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// Revision 1.3 2001/12/25 17:12:35 lampret
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// Revision 1.3 2001/12/25 17:12:35 lampret
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// Added RGPIO_INTS.
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// Added RGPIO_INTS.
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Line 89... |
// I/O signals core has. Range is from 1 to 32. If more than 32 I/O signals are
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// I/O signals core has. Range is from 1 to 32. If more than 32 I/O signals are
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// required, use several instances of GPIO IP core.
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// required, use several instances of GPIO IP core.
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//
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//
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// Default is 16.
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// Default is 16.
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//
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//
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`define GPIO_IOS 16
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`define GPIO_IOS 31
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//
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//
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// Undefine this one if you don't want to remove GPIO block from your design
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// Undefine this one if you don't want to remove GPIO block from your design
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// but you also don't need it. When it is undefined, all GPIO ports still
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// but you also don't need it. When it is undefined, all GPIO ports still
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// remain valid and the core can be synthesized however internally there is
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// remain valid and the core can be synthesized however internally there is
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Line 172... |
// not defined, err_o is asserted whenever 8- or 16-bit access is made.
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// not defined, err_o is asserted whenever 8- or 16-bit access is made.
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// Undefine it if you need to save some area.
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// Undefine it if you need to save some area.
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//
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//
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// By default it is defined.
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// By default it is defined.
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//
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//
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`define GPIO_STRICT_32BIT_ACCESS
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//`define GPIO_STRICT_32BIT_ACCESS
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//
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`ifndef GPIO_STRICT_32BIT_ACCESS
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// added by gorand :
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// if GPIO_STRICT_32BIT_ACCESS is not defined,
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// depending on number of gpio I/O lines, the following are defined :
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// if the number of I/O lines is in range 1-8, GPIO_WB_BYTES1 is defined,
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// if the number of I/O lines is in range 9-16, GPIO_WB_BYTES2 is defined,
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// if the number of I/O lines is in range 17-24, GPIO_WB_BYTES3 is defined,
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// if the number of I/O lines is in range 25-32, GPIO_WB_BYTES4 is defined,
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`define GPIO_WB_BYTES4
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`endif
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//
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//
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// WISHBONE address bits used for full decoding of GPIO registers.
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// WISHBONE address bits used for full decoding of GPIO registers.
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//
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//
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`define GPIO_ADDRHH 6
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`define GPIO_ADDRHH 6
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